Mesa (master): i965: Emit conditional code updates as required for GLSL VS if statements.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 7007f8b352763af89805f287153cb7972bff0523
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7007f8b352763af89805f287153cb7972bff0523

Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug  4 14:13:27 2009 -0700

i965: Emit conditional code updates as required for GLSL VS if statements.

Previously, we'd be branching based on whatever condition code happened to be
laying around.

---

 src/mesa/drivers/dri/i965/brw_vs_emit.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index f0eb6eb..bd584d2 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -1558,6 +1558,19 @@ void brw_vs_emit(struct brw_vs_compile *c )
 				    "unknown");
       }
 
+      /* Set the predication update on the last instruction of the native
+       * instruction sequence.
+       *
+       * This would be problematic if it was set on a math instruction,
+       * but that shouldn't be the case with the current GLSL compiler.
+       */
+      if (inst->CondUpdate) {
+	 struct brw_instruction *hw_insn = &p->store[p->nr_insn - 1];
+
+	 assert(hw_insn->header.destreg__conditionalmod == 0);
+	 hw_insn->header.destreg__conditionalmod = BRW_CONDITIONAL_NZ;
+      }
+
       if ((inst->DstReg.File == PROGRAM_OUTPUT)
           && (inst->DstReg.Index != VERT_RESULT_HPOS)
           && c->output_regs[inst->DstReg.Index].used_in_src) {