Mesa (gallium-0.1): tgis: SSE code generator doesn' t yet support indirect addressing of temp regs
Jose Fonseca
jrfonseca at kemper.freedesktop.org
Fri Aug 28 17:59:27 UTC 2009
Module: Mesa
Branch: gallium-0.1
Commit: 340fdf86f3250595341adeea946e1aee8acb56ce
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=340fdf86f3250595341adeea946e1aee8acb56ce
Author: Brian Paul <brianp at vmware.com>
Date: Fri Apr 24 17:08:59 2009 -0600
tgis: SSE code generator doesn't yet support indirect addressing of temp regs
Fall back to interpreter in this case.
---
src/gallium/auxiliary/tgsi/tgsi_sse2.c | 29 +++++++++++++++++++++++++++++
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
index 844c22f..eff1bb0 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
@@ -1301,6 +1301,31 @@ emit_cmp(
}
}
+
+/**
+ * Check if inst src/dest regs use indirect addressing into temporary
+ * register file.
+ */
+static boolean
+indirect_temp_reference(const struct tgsi_full_instruction *inst)
+{
+ uint i;
+ for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
+ const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[i];
+ if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
+ reg->SrcRegister.Indirect)
+ return TRUE;
+ }
+ for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
+ const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[i];
+ if (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
+ reg->DstRegister.Indirect)
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
static int
emit_instruction(
struct x86_function *func,
@@ -1308,6 +1333,10 @@ emit_instruction(
{
unsigned chan_index;
+ /* we can't handle indirect addressing into temp register file yet */
+ if (indirect_temp_reference(inst))
+ return FALSE;
+
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ARL:
FOR_EACH_DST0_ENABLED_CHANNEL( *inst, chan_index ) {
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