Mesa (master): radeong: Do ioctls before selecting pipe driver.
Corbin Simpson
csimpson at kemper.freedesktop.org
Wed Dec 2 21:11:14 UTC 2009
Module: Mesa
Branch: master
Commit: 4395d35c8a9f56d5e5614db583e700668933bfd3
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4395d35c8a9f56d5e5614db583e700668933bfd3
Author: Corbin Simpson <MostAwesomeDude at gmail.com>
Date: Wed Dec 2 12:31:04 2009 -0800
radeong: Do ioctls before selecting pipe driver.
---
src/gallium/winsys/drm/radeon/core/radeon_drm.c | 64 +++++++++++++++++++++
src/gallium/winsys/drm/radeon/core/radeon_r300.c | 67 +---------------------
2 files changed, 65 insertions(+), 66 deletions(-)
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c
index 770d7c7..0488250 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c
@@ -31,12 +31,76 @@
#include "radeon_drm.h"
+/* Helper function to do the ioctls needed for setup and init. */
+static void do_ioctls(int fd, struct radeon_winsys* winsys)
+{
+ struct drm_radeon_gem_info gem_info = {0};
+ struct drm_radeon_info info = {0};
+ int target = 0;
+ int retval;
+
+ info.value = (unsigned long)⌖
+
+ /* We do things in a specific order here.
+ *
+ * First, the PCI ID. This is essential and should return usable numbers
+ * for all Radeons. If this fails, we probably got handed an FD for some
+ * non-Radeon card.
+ *
+ * The GB and Z pipe requests should always succeed, but they might not
+ * return sensical values for all chipsets, but that's alright because
+ * the pipe drivers already know that.
+ *
+ * The GEM info is actually bogus on the kernel side, as well as our side
+ * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
+ * we don't actually use the info for anything yet.
+ * XXX update the above when we can safely use vram_size instead of vram_visible */
+ info.request = RADEON_INFO_DEVICE_ID;
+ retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get PCI ID, "
+ "error number %d\n", __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->pci_id = target;
+
+ info.request = RADEON_INFO_NUM_GB_PIPES;
+ retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get GB pipe count, "
+ "error number %d\n", __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->gb_pipes = target;
+
+ info.request = RADEON_INFO_NUM_Z_PIPES;
+ retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get Z pipe count, "
+ "error number %d\n", __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->z_pipes = target;
+
+ retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
+ &gem_info, sizeof(gem_info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
+ __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->gart_size = gem_info.gart_size;
+ /* XXX */
+ winsys->vram_size = gem_info.vram_visible;
+}
+
/* Create a pipe_screen. */
struct pipe_screen* radeon_create_screen(struct drm_api* api,
int drmFB,
struct drm_create_screen_arg *arg)
{
struct radeon_winsys* winsys = radeon_pipe_winsys(drmFB);
+ do_ioctls(drmFB, winsys);
if (debug_get_bool_option("RADEON_SOFTPIPE", FALSE)) {
return softpipe_create_screen((struct pipe_winsys*)winsys);
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
index b64e9c1..e0a45fb 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
@@ -120,69 +120,6 @@ static void radeon_flush_cs(struct radeon_winsys* winsys)
radeon_cs_erase(winsys->priv->cs);
}
-/* Helper function to do the ioctls needed for setup and init. */
-static void do_ioctls(struct radeon_winsys* winsys, int fd)
-{
- struct drm_radeon_gem_info gem_info = {0};
- struct drm_radeon_info info = {0};
- int target = 0;
- int retval;
-
- info.value = (unsigned long)⌖
-
- /* We do things in a specific order here.
- *
- * First, the PCI ID. This is essential and should return usable numbers
- * for all Radeons. If this fails, we probably got handed an FD for some
- * non-Radeon card.
- *
- * The GB and Z pipe requests should always succeed, but they might not
- * return sensical values for all chipsets, but that's alright because
- * the pipe drivers already know that.
- *
- * The GEM info is actually bogus on the kernel side, as well as our side
- * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
- * we don't actually use the info for anything yet.
- * XXX update the above when we can safely use vram_size instead of vram_visible */
- info.request = RADEON_INFO_DEVICE_ID;
- retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get PCI ID, "
- "error number %d\n", __FUNCTION__, retval);
- exit(1);
- }
- winsys->pci_id = target;
-
- info.request = RADEON_INFO_NUM_GB_PIPES;
- retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get GB pipe count, "
- "error number %d\n", __FUNCTION__, retval);
- exit(1);
- }
- winsys->gb_pipes = target;
-
- info.request = RADEON_INFO_NUM_Z_PIPES;
- retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get Z pipe count, "
- "error number %d\n", __FUNCTION__, retval);
- exit(1);
- }
- winsys->z_pipes = target;
-
- retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
- &gem_info, sizeof(gem_info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
- __FUNCTION__, retval);
- exit(1);
- }
- winsys->gart_size = gem_info.gart_size;
- /* XXX */
- winsys->vram_size = gem_info.vram_visible;
-}
-
void
radeon_setup_winsys(int fd, struct radeon_winsys* winsys)
{
@@ -193,11 +130,9 @@ radeon_setup_winsys(int fd, struct radeon_winsys* winsys)
struct radeon_winsys_priv* priv = winsys->priv;
- /* XXX backwards is bad precedent */
- do_ioctls(winsys, fd);
-
priv->csm = radeon_cs_manager_gem_ctor(fd);
+ /* XXX there *is* a definite size limit, can't remember it right now */
priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4);
radeon_cs_set_limit(priv->cs,
RADEON_GEM_DOMAIN_GTT, winsys->gart_size);
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