Mesa (master): i965: use the new prog_instruction::TexShadow field

[Brian Paul]

Module: Mesa
Branch: master
Commit: e0d907308150b4863cc4f24543e70e14207e966a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0d907308150b4863cc4f24543e70e14207e966a

Author: Brian Paul <brianp at vmware.com>
Date:   Fri Feb 20 13:50:27 2009 -0700

i965: use the new prog_instruction::TexShadow field

GLSL shadow() sampler calls are properly propogated down to the driver now.
The glean glsl1 shadow() tests work (except for the alpha channel).

---

 src/mesa/drivers/dri/i965/brw_wm.h       |    1 +
 src/mesa/drivers/dri/i965/brw_wm_emit.c  |    5 ++---
 src/mesa/drivers/dri/i965/brw_wm_fp.c    |    6 +++++-
 src/mesa/drivers/dri/i965/brw_wm_pass0.c |    1 +
 src/mesa/drivers/dri/i965/brw_wm_pass1.c |    4 ++--
 5 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 582031f..6b94591 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -143,6 +143,7 @@ struct brw_wm_instruction {
    GLuint writemask:4;
    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
+   GLuint tex_shadow:1; /* do shadow comparison? */
    GLuint eot:1;    	/* End of thread indicator for FB_WRITE*/
    GLuint target:10;    /* target binding table index for FB_WRITE*/
 };
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index b5050a3..281ffe0 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -671,7 +671,6 @@ static void emit_tex( struct brw_wm_compile *c,
 {
    struct brw_compile *p = &c->func;
    GLuint msgLength, responseLength;
-   GLboolean shadow = (c->key.shadowtex_mask & (1<<inst->tex_unit)) ? 1 : 0;
    GLuint i, nr;
    GLuint emit;
 
@@ -693,7 +692,7 @@ static void emit_tex( struct brw_wm_compile *c,
       break;
    }
 
-   if (shadow) {
+   if (inst->tex_shadow) {
       nr = 4;
       emit |= WRITEMASK_W;
    }
@@ -718,7 +717,7 @@ static void emit_tex( struct brw_wm_compile *c,
 	      inst->tex_unit + MAX_DRAW_BUFFERS, /* surface */
 	      inst->tex_unit,	  /* sampler */
 	      inst->writemask,
-	      (shadow ? 
+	      (inst->tex_shadow ? 
 	       BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE : 
 	       BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE),
 	      responseLength,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index 38cb964..37766b7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -192,6 +192,7 @@ static struct prog_instruction * emit_tex_op(struct brw_wm_compile *c,
 				       GLuint saturate,
 				       GLuint tex_src_unit,
 				       GLuint tex_src_target,
+				       GLuint tex_shadow,
 				       struct prog_src_register src0,
 				       struct prog_src_register src1,
 				       struct prog_src_register src2 )
@@ -205,6 +206,7 @@ static struct prog_instruction * emit_tex_op(struct brw_wm_compile *c,
    inst->SaturateMode = saturate;   
    inst->TexSrcUnit = tex_src_unit;
    inst->TexSrcTarget = tex_src_target;
+   inst->TexShadow = tex_shadow;
    inst->SrcReg[0] = src0;
    inst->SrcReg[1] = src1;
    inst->SrcReg[2] = src2;
@@ -221,7 +223,7 @@ static struct prog_instruction * emit_op(struct brw_wm_compile *c,
 				       struct prog_src_register src2 )
 {
    return emit_tex_op(c, op, dest, saturate,
-                      0, 0,  /* tex unit, target */
+                      0, 0, 0,  /* tex unit, target, shadow */
                       src0, src1, src2);
 }
    
@@ -705,6 +707,7 @@ static void precalc_tex( struct brw_wm_compile *c,
                   inst->SaturateMode,
                   unit,
                   inst->TexSrcTarget,
+                  inst->TexShadow,
                   coord,
                   src_undef(),
                   src_undef());
@@ -765,6 +768,7 @@ static void precalc_tex( struct brw_wm_compile *c,
                   inst->SaturateMode,
                   unit,
                   inst->TexSrcTarget,
+                  inst->TexShadow,
                   coord,
                   src_undef(),
                   src_undef());
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass0.c b/src/mesa/drivers/dri/i965/brw_wm_pass0.c
index 3ade6aa..783545d 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass0.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass0.c
@@ -349,6 +349,7 @@ translate_insn(struct brw_wm_compile *c,
    out->saturate = (inst->SaturateMode != SATURATE_OFF);
    out->tex_unit = inst->TexSrcUnit;
    out->tex_idx = inst->TexSrcTarget;
+   out->tex_shadow = inst->TexShadow;
    out->eot = inst->Sampler & 1;
    out->target = inst->Sampler>>1;
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
index 6eaed8a..cf03189 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
@@ -210,9 +210,10 @@ void brw_wm_pass1( struct brw_wm_compile *c )
 	 break;
 
       case OPCODE_TEX:
+      case OPCODE_TXP:
 	 read0 = get_texcoord_mask(inst->tex_idx);
 
-	 if (c->key.shadowtex_mask & (1<<inst->tex_unit))
+         if (inst->tex_shadow)
 	    read0 |= WRITEMASK_Z;
 	 break;
 
@@ -267,7 +268,6 @@ void brw_wm_pass1( struct brw_wm_compile *c )
 	 break;
 
       case OPCODE_DST:
-      case OPCODE_TXP:
       default:
 	 break;
       }