Mesa (master): i965: Don't set a reserved bit in MI_FLUSH.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: d43599afef046a36ae75a29eaea941eb04929abf
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d43599afef046a36ae75a29eaea941eb04929abf

Author: Eric Anholt <eric at anholt.net>
Date:   Tue Jun 23 19:29:35 2009 -0700

i965: Don't set a reserved bit in MI_FLUSH.

I noticed this when this MI_FLUSH showed up in IPEHR for the ut2004 hang.
Not setting the reserved bit didn't help, though.

---

 src/mesa/drivers/dri/i965/brw_vtbl.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index ba03afd..b284e62 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -194,7 +194,7 @@ static GLuint brw_flush_cmd( void )
    struct brw_mi_flush flush;
    flush.opcode = CMD_MI_FLUSH;
    flush.pad = 0;
-   flush.flags = BRW_FLUSH_READ_CACHE | BRW_FLUSH_STATE_CACHE;
+   flush.flags = BRW_FLUSH_STATE_CACHE;
    return *(GLuint *)&flush;
 }