Mesa (radeon-rewrite): r300: don' t send now forbidden register to kernel when with memory manager
Jerome Glisse
glisse at kemper.freedesktop.org
Thu May 14 15:26:25 UTC 2009
Module: Mesa
Branch: radeon-rewrite
Commit: 76a64958a4ca38ec27b63a909979c493c507b952
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76a64958a4ca38ec27b63a909979c493c507b952
Author: Jerome Glisse <glisse at freedesktop.org>
Date: Thu May 14 17:24:19 2009 +0200
r300: don't send now forbidden register to kernel when with memory manager
---
src/mesa/drivers/dri/r300/r300_cmdbuf.c | 51 +++++++++++++++++++++++++++---
src/mesa/drivers/dri/r300/r300_context.h | 10 ++++--
src/mesa/drivers/dri/r300/r300_state.c | 22 ++++++++-----
3 files changed, 67 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 6ae724b..a0d99dd 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -308,6 +308,34 @@ static void emit_zb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
END_BATCH();
}
+static void emit_gb_misc(GLcontext *ctx, struct radeon_state_atom * atom)
+{
+ r300ContextPtr r300 = R300_CONTEXT(ctx);
+ BATCH_LOCALS(&r300->radeon);
+
+ if (!r300->radeon.radeonScreen->driScreen->dri2.enabled) {
+ BEGIN_BATCH_NO_AUTOSTATE(4);
+ OUT_BATCH(atom->cmd[0]);
+ OUT_BATCH(atom->cmd[1]);
+ OUT_BATCH(atom->cmd[2]);
+ OUT_BATCH(atom->cmd[3]);
+ END_BATCH();
+ }
+}
+
+static void emit_shade_misc(GLcontext *ctx, struct radeon_state_atom * atom)
+{
+ r300ContextPtr r300 = R300_CONTEXT(ctx);
+ BATCH_LOCALS(&r300->radeon);
+
+ if (!r300->radeon.radeonScreen->driScreen->dri2.enabled) {
+ BEGIN_BATCH_NO_AUTOSTATE(2);
+ OUT_BATCH(atom->cmd[0]);
+ OUT_BATCH(atom->cmd[1]);
+ END_BATCH();
+ }
+}
+
static void emit_zstencil_format(GLcontext *ctx, struct radeon_state_atom * atom)
{
r300ContextPtr r300 = R300_CONTEXT(ctx);
@@ -464,7 +492,10 @@ void r300InitCmdBuf(r300ContextPtr r300)
ALLOC_STATE(gb_enable, always, 2, 0);
r300->hw.gb_enable.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GB_ENABLE, 1);
ALLOC_STATE(gb_misc, always, R300_GB_MISC_CMDSIZE, 0);
- r300->hw.gb_misc.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GB_MSPOS0, 5);
+ r300->hw.gb_misc.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GB_MSPOS0, 3);
+ r300->hw.gb_misc.emit = emit_gb_misc;
+ ALLOC_STATE(gb_misc2, always, R300_GB_MISC2_CMDSIZE, 0);
+ r300->hw.gb_misc2.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, 0x401C, 2);
ALLOC_STATE(txe, always, R300_TXE_CMDSIZE, 0);
r300->hw.txe.cmd[R300_TXE_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_TX_ENABLE, 1);
ALLOC_STATE(ga_point_s0, always, 5, 0);
@@ -479,8 +510,11 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.lcntl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_LINE_CNTL, 1);
ALLOC_STATE(ga_line_stipple, always, 4, 0);
r300->hw.ga_line_stipple.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_LINE_STIPPLE_VALUE, 3);
- ALLOC_STATE(shade, always, 5, 0);
- r300->hw.shade.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_ENHANCE, 4);
+ ALLOC_STATE(shade, always, 2, 0);
+ r300->hw.shade.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_ENHANCE, 1);
+ r300->hw.shade.emit = emit_shade_misc;
+ ALLOC_STATE(shade2, always, 4, 0);
+ r300->hw.shade2.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, 0x4278, 3);
ALLOC_STATE(polygon_mode, always, 4, 0);
r300->hw.polygon_mode.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_POLY_MODE, 3);
ALLOC_STATE(fogp, always, 3, 0);
@@ -587,8 +621,15 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.rb3d_dither_ctl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_DITHER_CTL, 9);
ALLOC_STATE(rb3d_aaresolve_ctl, always, 2, 0);
r300->hw.rb3d_aaresolve_ctl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_AARESOLVE_CTL, 1);
- ALLOC_STATE(rb3d_discard_src_pixel_lte_threshold, always, 3, 0);
- r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 2);
+ if (is_r500) {
+ ALLOC_STATE(rb3d_discard_src_pixel_lte_threshold, always, 3, 0);
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 2);
+ } else {
+ ALLOC_STATE(rb3d_discard_src_pixel_lte_threshold, always, 3, 0);
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[0] = (2 << 30);
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = (2 << 30);
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = (2 << 30);
+ }
ALLOC_STATE(zs, always, R300_ZS_CMDSIZE, 0);
r300->hw.zs.cmd[R300_ZS_CMD_0] =
cmdpacket0(r300->radeon.radeonScreen, R300_ZB_CNTL, 3);
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 379977b..d45e4be 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -116,9 +116,11 @@ typedef struct r300_context *r300ContextPtr;
#define R300_GB_MISC_MSPOS_0 1
#define R300_GB_MISC_MSPOS_1 2
#define R300_GB_MISC_TILE_CONFIG 3
-#define R300_GB_MISC_SELECT 4
-#define R300_GB_MISC_AA_CONFIG 5
-#define R300_GB_MISC_CMDSIZE 6
+#define R300_GB_MISC_CMDSIZE 4
+#define R300_GB_MISC2_CMD_0 0
+#define R300_GB_MISC2_SELECT 1
+#define R300_GB_MISC2_AA_CONFIG 2
+#define R300_GB_MISC2_CMDSIZE 3
#define R300_TXE_CMD_0 0
#define R300_TXE_ENABLE 1
@@ -307,6 +309,7 @@ struct r300_hw_state {
struct radeon_state_atom pvs; /* pvs_cntl (22D0) */
struct radeon_state_atom gb_enable; /* (4008) */
struct radeon_state_atom gb_misc; /* Multisampling position shifts ? (4010) */
+ struct radeon_state_atom gb_misc2; /* Multisampling position shifts ? (4010) */
struct radeon_state_atom ga_point_s0; /* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) (4200) */
struct radeon_state_atom ga_triangle_stipple; /* (4214) */
struct radeon_state_atom ps; /* pointsize (421C) */
@@ -314,6 +317,7 @@ struct r300_hw_state {
struct radeon_state_atom lcntl; /* line control */
struct radeon_state_atom ga_line_stipple; /* (4260) */
struct radeon_state_atom shade;
+ struct radeon_state_atom shade2;
struct radeon_state_atom polygon_mode;
struct radeon_state_atom fogp; /* fog parameters (4294) */
struct radeon_state_atom ga_soft_reset; /* (429C) */
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index b823995..7a025aa 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -829,18 +829,19 @@ static void r300ShadeModel(GLcontext * ctx, GLenum mode)
R300_STATECHANGE(rmesa, shade);
rmesa->hw.shade.cmd[1] = 0x00000002;
+ R300_STATECHANGE(rmesa, shade2);
switch (mode) {
case GL_FLAT:
- rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_FLAT;
+ rmesa->hw.shade2.cmd[1] = R300_RE_SHADE_MODEL_FLAT;
break;
case GL_SMOOTH:
- rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_SMOOTH;
+ rmesa->hw.shade2.cmd[1] = R300_RE_SHADE_MODEL_SMOOTH;
break;
default:
return;
}
- rmesa->hw.shade.cmd[3] = 0x00000000;
- rmesa->hw.shade.cmd[4] = 0x00000000;
+ rmesa->hw.shade2.cmd[2] = 0x00000000;
+ rmesa->hw.shade2.cmd[3] = 0x00000000;
}
static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face,
@@ -2079,8 +2080,8 @@ static void r300ResetHwState(r300ContextPtr r300)
}
/* XXX: Enable anti-aliasing? */
- r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
- r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0;
+ r300->hw.gb_misc2.cmd[R300_GB_MISC2_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
+ r300->hw.gb_misc2.cmd[R300_GB_MISC2_SELECT] = 0;
r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
@@ -2151,8 +2152,13 @@ static void r300ResetHwState(r300ContextPtr r300)
r300->hw.rb3d_aaresolve_ctl.cmd[1] = 0;
- r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
- r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
+ if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
+ } else {
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = (2 << 30);
+ r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = (2 << 30);
+ }
r300->hw.zb_depthclearvalue.cmd[1] = 0;
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