Mesa (master): i915g: fix bug in ds clear logic (still disabled)

[Roland Scheidegger]

Module: Mesa
Branch: master
Commit: b6cd0712e9961c5cfbc94b5e59467ed90aeb3a2f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6cd0712e9961c5cfbc94b5e59467ed90aeb3a2f

Author: Roland Scheidegger <sroland at vmware.com>
Date:   Sat Jun  5 16:49:51 2010 +0200

i915g: fix bug in ds clear logic (still disabled)

---

 src/gallium/drivers/i915/i915_surface.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/i915/i915_surface.c b/src/gallium/drivers/i915/i915_surface.c
index 7869be8..f40876e 100644
--- a/src/gallium/drivers/i915/i915_surface.c
+++ b/src/gallium/drivers/i915/i915_surface.c
@@ -143,8 +143,8 @@ i915_clear_depth_stencil(struct pipe_context *pipe,
    /* XXX presumably this does read-modify-write
       (otherwise this won't work anyway). Hence will only want to
       do it if really have stencil and it isn't cleared */
-   if (!((clear_flags & PIPE_CLEAR_STENCIL) ||
-       (dst->format != PIPE_FORMAT_Z24_UNORM_S8_USCALED)))
+   if ((clear_flags & PIPE_CLEAR_STENCIL) ||
+       (dst->format != PIPE_FORMAT_Z24_UNORM_S8_USCALED))
       mask |= XY_COLOR_BLT_WRITE_ALPHA;
 
    i915_fill_blit( i915_context(pipe),