Mesa (master): i965: Set the correct WM GRF start reg on gen6.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 7ba2ecb32bb80ac67a41c63ddea1846105aaf910
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ba2ecb32bb80ac67a41c63ddea1846105aaf910

Author: Zhenyu Wang <zhenyuw at linux.intel.com>
Date:   Sat Jun 12 21:19:38 2010 -0700

i965: Set the correct WM GRF start reg on gen6.

---

 src/mesa/drivers/dri/i965/gen6_wm_state.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 1eb17ca..ed1a72f 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -98,7 +98,8 @@ upload_wm_state(struct brw_context *brw)
 
    /* CACHE_NEW_SAMPLER */
    dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
-   dw4 |= (1 << GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+   dw4 |= (brw->wm.prog_data->first_curbe_grf <<
+	   GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
 
    dw5 |= (40 - 1) << GEN6_WM_MAX_THREADS_SHIFT;
    dw5 |= GEN6_WM_DISPATCH_ENABLE;