Mesa (master): r300: fix blits for textures of width/ height greater than 2048 on r5xx
Marek Olšák
mareko at kemper.freedesktop.org
Sat May 29 15:44:38 UTC 2010
Module: Mesa
Branch: master
Commit: b202c785862363d0534f04a8f2e8f0b5232d9b13
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b202c785862363d0534f04a8f2e8f0b5232d9b13
Author: Marek Olšák <maraeo at gmail.com>
Date: Sat May 29 17:39:51 2010 +0200
r300: fix blits for textures of width/height greater than 2048 on r5xx
Yes I am fixing r300c ... who knew?
---
src/mesa/drivers/dri/r300/r300_blit.c | 14 +++++++++-----
1 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/r300/r300_blit.c b/src/mesa/drivers/dri/r300/r300_blit.c
index 6fd41b6..d2c25fb 100644
--- a/src/mesa/drivers/dri/r300/r300_blit.c
+++ b/src/mesa/drivers/dri/r300/r300_blit.c
@@ -141,10 +141,11 @@ static void r300_emit_tx_setup(struct r300_context *r300,
unsigned height,
unsigned pitch)
{
+ int is_r500 = r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515;
BATCH_LOCALS(&r300->radeon);
- assert(width <= 2048);
- assert(height <= 2048);
+ assert(is_r500 ? width <= 4096 : width <= 2048);
+ assert(is_r500 ? height <= 4096 : height <= 2048);
assert(r300TranslateTexFormat(mesa_format) >= 0);
assert(offset % 32 == 0);
@@ -159,14 +160,17 @@ static void r300_emit_tx_setup(struct r300_context *r300,
(0 << 28));
OUT_BATCH_REGVAL(R300_TX_FILTER1_0, 0);
OUT_BATCH_REGVAL(R300_TX_SIZE_0,
- ((width-1) << R300_TX_WIDTHMASK_SHIFT) |
- ((height-1) << R300_TX_HEIGHTMASK_SHIFT) |
+ (((width - 1) & 0x7ff) << R300_TX_WIDTHMASK_SHIFT) |
+ (((height - 1) & 0x7ff) << R300_TX_HEIGHTMASK_SHIFT) |
(0 << R300_TX_DEPTHMASK_SHIFT) |
(0 << R300_TX_MAX_MIP_LEVEL_SHIFT) |
R300_TX_SIZE_TXPITCH_EN);
OUT_BATCH_REGVAL(R300_TX_FORMAT_0, r300TranslateTexFormat(mesa_format));
- OUT_BATCH_REGVAL(R300_TX_FORMAT2_0, pitch - 1);
+ OUT_BATCH_REGVAL(R300_TX_FORMAT2_0,
+ (pitch - 1) |
+ (is_r500 && width > 2048 ? R500_TXWIDTH_BIT11 : 0) |
+ (is_r500 && height > 2048 ? R500_TXHEIGHT_BIT11 : 0));
OUT_BATCH_REGSEQ(R300_TX_OFFSET_0, 1);
OUT_BATCH_RELOC(0, bo, offset, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
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