Mesa (master): i965: Fix fragcoord_w on gen6 with 16-wide.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 03b2e0fcdf92c76411a957c3ea898233fb4ce1be
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=03b2e0fcdf92c76411a957c3ea898233fb4ce1be

Author: Eric Anholt <eric at anholt.net>
Date:   Fri Apr 29 12:17:02 2011 -0700

i965: Fix fragcoord_w on gen6 with 16-wide.

The payload regs can go all the way up to register 60+, so just give
them 8 bits to be addressed by instead of 3-4 (which made source_w_reg
of 8 end up 0).  There's no reason to aggressively pack these fields,
as they are just used as compiler information, where being easier to
access is probably more important than shaving a byte or two off of
the structure.

Fixes piglit fragcoord_w.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36649

---

 src/mesa/drivers/dri/i965/brw_wm.h |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 8e5a9cd..a5f99a0 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -201,11 +201,11 @@ struct brw_wm_compile {
       PASS2_DONE
    } state;
 
-   GLuint source_depth_reg:3;
-   GLuint source_w_reg:3;
-   GLuint aa_dest_stencil_reg:3;
-   GLuint dest_depth_reg:3;
-   GLuint nr_payload_regs:4;
+   uint8_t source_depth_reg;
+   uint8_t source_w_reg;
+   uint8_t aa_dest_stencil_reg;
+   uint8_t dest_depth_reg;
+   uint8_t nr_payload_regs;
    GLuint computes_depth:1;	/* could be derived from program string */
    GLuint source_depth_to_render_target:1;
    GLuint runtime_check_aads_emit:1;