Mesa (master): 57 new commits

Eric Anholt anholt at kemper.freedesktop.org
Tue Aug 16 13:25:14 PDT 2011


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ddf0f1c3451eef8a7c7f46afca623dc4f7c5af6
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Aug 15 21:02:10 2011 -0700

    i965/vs: Fix multiplies to actually do 32-bit multiplies.
    
    Fixes vs-op-mult-int-int and friends.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bf70c29adf175f51d0347d0187aecc0e9bbbcb8
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Aug 15 20:59:24 2011 -0700

    i965/vs: Add support for conversion of FIXED_HW_REG src_reg to/from dst_reg.
    
    This was quietly occurring in some emit code I produced, and failed.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9a86ae3370948acb1276e80fbbc421d7025db36
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Aug 15 20:43:42 2011 -0700

    i965/vs: Fix memory leak of ralloc context for the visitor.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=feff7c62ce446f4e3bb755a2f40dcbd0e70155e4
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Aug 15 20:13:53 2011 -0700

    i965/vs: Fix condition code for scalar expression all_equals.
    
    Fixes vs-op-eq-bool-bool.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a649277cb57cc13fb38f8e8daf07e8a2b96223c
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 12 05:32:25 2011 -0700

    i965/vs: Don't assertion fail on vertex texturing.
    
    The linker will reject the program, but we need to survive until then.
    Fixes abort in glsl1-2D Texture lookup with explicit lod (Vertex
    shader)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0c595ac8032aa9aed402a513870b8dc92e42903
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 12 05:28:53 2011 -0700

    i965/gen6: Force WHILE exec size to 8.
    
    We can't just look at the instruction that happens to appear at the
    start of the loop, because it might be some other exec size and cause
    us to only loop on the first N channels.  We always want 8 in our
    current code (since 16 doesn't work so we don't do 16-wide fragment in
    that case).
    
    Fixes loop-03.vert, which was triggering the assertions.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=905f3d03090c7b86e410959c5640054f5f6894ef
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 12 05:15:50 2011 -0700

    i965/vs: Remove remaining use of foreach_iter.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=54e66a0a6327b55f15a7c641ec68da505ff19a35
Author: Eric Anholt <eric at anholt.net>
Date:   Thu Aug 11 16:27:41 2011 -0700

    i965/vs: Fix abs/negate handling on attributes.
    
    Fixes glsl-vs-neg-attribute and glsl-vs-abs-attribute.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7642c1de6b65b7dfd9e39904291cc9737cd54b56
Author: Eric Anholt <eric at anholt.net>
Date:   Thu Aug 11 08:09:10 2011 -0700

    i965/vs: Avoid generating a MOV for most ir_assignment handling.
    
    Removes an average of 11.5% of instructions in 54% of vertex shaders
    in shader-db.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fbe7fe13359d3f349664410ec73d7bd48824ed6
Author: Eric Anholt <eric at anholt.net>
Date:   Thu Aug 11 09:52:08 2011 -0700

    i965/vs: Run the shader backend at link time and return compile failures.
    
    Link failure is something that shouldn't happen, but we sometimes want
    it during development.  The precompile also allows analysis of shader
    codegen with shader-db.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d376fa8e84b044ead47586d1b56a10742bcbdac7
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Aug 15 18:40:14 2011 -0700

    i965: Fix assertion failure on a loop consisting of while (true) { break }.
    
    On enabling the precompile step in the VS, we tripped over this
    assertion failure in glsl-link-bug-30552.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8980c61b2932cd4c8791fcc5afdb54fa033c224
Author: Eric Anholt <eric at anholt.net>
Date:   Thu Aug 11 09:17:18 2011 -0700

    i965/vs: Fix the trivial register allocator's failure path.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=193a9a209d5121e2c20f1d20c61587b1e3d0603d
Author: Eric Anholt <eric at anholt.net>
Date:   Wed Aug 10 14:13:23 2011 -0700

    i965/vs: Add support for if(any(bvec)) on gen6.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=072d64121e13ad6bcb9b703090de1ee4a59f7096
Author: Eric Anholt <eric at anholt.net>
Date:   Wed Aug 10 11:38:42 2011 -0700

    i965/vs: Add support for GL_FIXED attributes.
    
    Fixes arb_es2_compatibility-fixed-type

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aed5e353e95f47773864c6e61c506b9ddad0e2e9
Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug 9 15:19:26 2011 -0700

    i965/vs: Clamp vertex color outputs when required by ARB_color_buffer_float.
    
    Fixes glsl-vs-vertex-color.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a55fbbc1a2b579aed1e80036367b521ef6928f66
Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug 9 15:08:47 2011 -0700

    i965/vs: Fix access of attribute arrays.
    
    By leaving out the column index, we were reading an unallocated
    attribute on glsl-mat-attribute.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fea7d34b3545878ce00914f388e1eeebf55f7748
Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug 9 14:49:29 2011 -0700

    i965/vs: Fix builtin uniform setup.
    
    I want to intelligently pack them at some point, but for now we have
    the params set up in groups of 4.  Fixes glsl-vs-normalscale.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b359e3ea015576d0e75bf5ec19aceef337311a3
Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug 9 14:35:38 2011 -0700

    i965/vs: Add support for loops.
    
    This is copied from brw_fs.cpp, instead of doing the temporary IR
    generation that ir_to_mesa does.  Fixes glsl-vs-loop and friends.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=abf843a797876b5e3c5c91dbec25b6553d2cc281
Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug 9 12:30:41 2011 -0700

    i965/vs: Add support for ir_binop_pow.
    
    Fixes vs-pow-float-float.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=250770b74d33bb8625c780a74a89477af033d13a
Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug 9 11:00:28 2011 -0700

    i965/vs: Respect the gen6 limitation that math opcodes can't be align16.
    
    Fixes vs-acos-vec3 and friends.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6408b0295f5c8be6fea891a025d79752484721b6
Author: Eric Anholt <eric at anholt.net>
Date:   Tue Aug 9 10:57:09 2011 -0700

    i965/vs: Fix implementation of ir_unop_any.
    
    We were inheriting whatever previous predicate existed.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b91eefe7cbe771397684b5970f7c04313baa2f0
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Aug 8 15:56:11 2011 -0700

    i965/vs: Slightly improve the trivial reg allocator to skip unused regs.
    
    This fixes most of the regressions in the vs array test set from the
    varying array indexing work, since the giant array that was originally
    allocated in virtual GRF space never gets used and is only ever
    read/stored from scratch space.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e94bdbe04a4f0adb73ab92153987f0c9f48814f7
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 17:09:12 2011 -0700

    i965: Add gen6 disassembly for DP render cache messages.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=54fa706d6f06955221cb6b452b5b170bfaaceef4
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 13:38:50 2011 -0700

    i965/vs: Enable variable array indexing in the VS.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=584ff407482fd3baf5ce081dbbf9653eb76c40f1
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 13:36:11 2011 -0700

    i965/vs: Add support for scratch read/write codegen.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f22f98ccd69bb5e8df3c78203bce9bc630965c1
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 13:16:06 2011 -0700

    i965: Make some EU emit code for DP read/write messages non-static.
    
    We keep building these strange interfaces for DP read/write where
    there's a helper function with some partially-specific,
    partially-general controls, which is used in exactly one place in code
    generation.  Making these public will let us set up those instructions
    in the one place they're to be generated.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0e4d71070cd7fa197ed98612782484ec1f27123
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 12:15:26 2011 -0700

    i965/vs: Move virtual GRFs with array accesses to them to scratch space.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=758c3c2b4588f235def48b2f28c0479a70f7c194
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 15:21:25 2011 -0700

    i965/vs: Reserve MRF 14/15 for array loads/register unspilling.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ff4f11dd94711a498cde0330101c58636ef2741
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 10:59:39 2011 -0700

    i965/vs: Track the variable index of array accesses.
    
    This isn't used currently, as we lower all array accesses.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=314c2574ff6e562a6cfc5fb84980f092e495a948
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 10:47:54 2011 -0700

    i965: Add remaining scratch space setup emit to unit states.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b224d66a01f3ce867fb05558b25749705bbfe7a
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 10:44:15 2011 -0700

    i965: Set up allocation of a VS scratch space if required.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e355b179b2bd42a585464f17759764083fa3ef26
Author: Eric Anholt <eric at anholt.net>
Date:   Sun Aug 7 10:43:49 2011 -0700

    i965: Remove dead brw->wm.max_threads field.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=160a5a3ff0fc826a2978c6bea6de21b445f612e9
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 21:53:00 2011 -0700

    i965/vs: Add support for VUEs larger than a single URB write.
    
    Fixes glsl-max-varyings.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=31ef2e3ec2f5837eea0899b4bda5ea15e335a6a2
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 21:22:36 2011 -0700

    i965/vs: Avoid generating extra moves when setting up large ir_constants.
    
    We were also screwing up the types in the process, and just not
    emitting moves was easier.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aba9801996f2f524a765df378c234a7645b3a5d1
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 20:54:25 2011 -0700

    i965/vs: Fix types of varying outputs.
    
    For structs/arrays/matrices, they were ending up as uint because we
    forgot to set them.  All varyings in GLSL 1.20 are of base type float,
    so just force the matter here (which gets inherited at
    emit_urb_writes() time).
    
    Fixes vs-varying-array-mat2-col-rd.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=979072613139870f12e329e4b483c7f688b40560
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 20:46:03 2011 -0700

    i965/vs: Handle assignment of structures/arrays/matrices better.
    
    This gets the right types on the instructions, as well as emitting
    minimal swizzles/writemasks.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=930afd1774bdcd013bccbd7b5717ae0bb8e3dea3
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 20:26:48 2011 -0700

    i965/vs: Don't forget to set up assignment condition code for arrays/structs.
    
    Fixes vs-uniform-array-mat2-index-col-rd.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cda28bca0d789c328d19bf90afd35a5ff74cfb77
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 20:16:21 2011 -0700

    i965/vs: Apply the gen6 math workaround for math1 instructions.
    
    Fixes glsl-vs-masked-cos.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b7632aeaa5f8b4ab3da7d33a3c71c71023a072a
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 20:03:31 2011 -0700

    i965/vs: Add support for if(any_nequal()) and if(all_equal()) on gen6.
    
    Fixes vs-temp-array-mat2-col-rd.shader_test.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3752b399ab376aa53392afb8f2d4b526054f0a8
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 19:40:46 2011 -0700

    i965/vs: Add support for dot product opcodes.
    
    Fixes glsl-vs-dot-vec2.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e947c2546c25c0dfa93b538e54113af1bf582df
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 19:38:44 2011 -0700

    i965/vs: Fix the types of array/struct dereferences.
    
    Fixes glsl-vs-arrays-3.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=814a9bef30beda427e8fbf6f3b8abb6a45f0e2e4
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 19:31:53 2011 -0700

    i965/vs: Drop the assertion about dst.reg_offset == 0.
    
    Adding the offset is the right thing to do here, and fixes
    glsl-vs-mat-add-1.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5363c7fd2ed6318e86ba4a62adc0c2377e51eef
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 19:29:41 2011 -0700

    i965/vs: Use an appropriate swizzle on src regs from variables.
    
    Fixes glsl-vs-if-bool.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eca762d831e099b549dafa0be896eac82b3fceb9
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 19:18:31 2011 -0700

    i965/vs: Fix support for zero uniforms in use.
    
    We were looking for attributes in the wrong place, and pointlessly
    doing the work on gen6 at all.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=164ccd27787e0df4ae6f85a7178aff0720d56ac9
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 19:12:16 2011 -0700

    i965/vs: Fix support for "IF" instructions by copying brw_fs_visitor.cpp.
    
    Fixes glsl-vs-if-greater.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa753c5a14637ede804e8043762693122174bf8c
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 19:05:42 2011 -0700

    i965/vs: Disable loops for now until rendering is generally correct.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb468fc1ede9b0a5231ebfaa51df444502d33654
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 16:37:18 2011 -0700

    i965/vs: Fix ir_swizzle handling.
    
    I decided to refactor it a bit in adapting ir_to_mesa.cpp code, and
    mangled it.  Fixes glsl-vs-cross-2.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=78fac1892a3a7a90eb7baf78903d70649028d27a
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 16:35:24 2011 -0700

    i965/vs: Allocate storage for "auto" variables just like temps.
    
    Fixes segfault in glsl-vs-cross-2.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=82aa9299fbfe92d2526fa9f7ffd2a1ebc7827ee9
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 16:31:30 2011 -0700

    i965/vs: Allow scalar values in assignments, too.
    
    Fixes glsl-vs-all-02 and many other tests.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0f334a3ed3c6645abd1812e39cd52f1dfa32fa1
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 16:29:48 2011 -0700

    i965/vs: Don't emit an extra copy of the vertex position.
    
    Fixes glsl-vs-abs-neg, glsl-vs-all-01, and probably many other tests.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a4857246c79c42d918a84d7e28e9afff3a9ef6d
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 16:23:42 2011 -0700

    i965/vs: Port the fix for clip plane writemasks from brw_vs_emit.c.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=83d5850518388202c5589d3181b84fb54c213fb1
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 16:18:00 2011 -0700

    i965/vs: Fix constant vector construction.
    
    Fixes some issues noticed in glsl-vs-all-01.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a070d5f363e99b0f846d555e9ca3a74ec807fdc0
Author: Eric Anholt <eric at anholt.net>
Date:   Wed May 4 12:50:16 2011 -0700

    i965/vs: Start adding support for uniforms
    
    There's no clever packing here, no pull constants, and no array support.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=af3c9803d818fd33139f1247a387d64b967b8992
Author: Eric Anholt <eric at anholt.net>
Date:   Mon May 2 09:45:40 2011 -0700

    i965: Start adding the VS visitor and codegen.
    
    The low-level IR is a mashup of brw_fs.cpp and ir_to_mesa.cpp.  It's
    currently controlled by the INTEL_NEW_VS=1 environment variable, and
    only tested for the trivial "gl_Position = gl_Vertex;" shader so far.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=65b5cbbcf783f6c668ab5b31a0734680dd396794
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Aug 5 12:38:58 2011 -0700

    i965: Rename math FS_OPCODE_* to SHADER_OPCODE_*.
    
    I want to just use the same enums in the VS.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6034b9a5124475d300d0678bd2fb6160865fa972
Author: Eric Anholt <eric at anholt.net>
Date:   Tue May 3 10:55:50 2011 -0700

    i965: Create a shared enum for hardware and compiler-internal opcodes.
    
    This should make gdbing more pleasant, and it might be used in sharing
    part of the codegen between the VS and FS backends.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1f00731fd48dde68b67f157c27eb20982e82193
Author: Eric Anholt <eric at anholt.net>
Date:   Tue May 3 15:27:38 2011 -0700

    i965: Generate driver-specific IR for non-fragment shaders as well.
    
    This will be used by the new vertex shader backend.  The scalarizing
    passes are skipped for non-fragment, since vertex and geometry threads
    are based on vec4s.



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