Mesa (master): r600g: fill out missing entries in opcode tables.

Dave Airlie airlied at kemper.freedesktop.org
Wed Aug 24 05:31:38 PDT 2011


Module: Mesa
Branch: master
Commit: cc9a8915f093c57d2748370d18ed47f66c933013
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc9a8915f093c57d2748370d18ed47f66c933013

Author: Dave Airlie <airlied at redhat.com>
Date:   Wed Aug 24 13:27:06 2011 +0100

r600g: fill out missing entries in opcode tables.

this just adds the missing opcodes as unsupported.

Signed-off-by: Dave Airlie <airlied at redhat.com>

---

 src/gallium/drivers/r600/r600_shader.c |   36 ++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 406e87b..c37bb72 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -3366,6 +3366,18 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CASE,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DEFAULT,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_ENDSWITCH,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+	{TGSI_OPCODE_LOAD,      0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_LOAD_MS,   0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE,    0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_B,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_C,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_D,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_L,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_GATHER4,   0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_RESINFO,	0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_LAST,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 };
 
@@ -3524,6 +3536,18 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CASE,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DEFAULT,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_ENDSWITCH,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+	{TGSI_OPCODE_LOAD,      0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_LOAD_MS,   0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE,    0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_B,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_C,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_D,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_L,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_GATHER4,   0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_RESINFO,	0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_LAST,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 };
 
@@ -3682,5 +3706,17 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CASE,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DEFAULT,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_ENDSWITCH,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+	{TGSI_OPCODE_LOAD,      0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_LOAD_MS,   0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE,    0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_B,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_C,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_D,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_L,  0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_GATHER4,   0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_RESINFO,	0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+	{TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
 	{TGSI_OPCODE_LAST,	0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
 };



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