Mesa (master): i965/vs: Avoid the emit(), remove(), insert_before() for array instructions.

Eric Anholt anholt at kemper.freedesktop.org
Wed Aug 31 11:38:50 PDT 2011


Module: Mesa
Branch: master
Commit: 0c9ae24dbdfcfea06fb0e8cdfd7737da48fa4e31
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c9ae24dbdfcfea06fb0e8cdfd7737da48fa4e31

Author: Eric Anholt <eric at anholt.net>
Date:   Sat Aug 27 11:13:33 2011 -0700

i965/vs: Avoid the emit(), remove(), insert_before() for array instructions.

v2: Add generator instructions for the scratch opcodes.
    Add emit_before() for handling ->ir and ->annotation inheritance.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_vec4.h           |    6 ++
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |   96 ++++++++++++-----------
 2 files changed, 56 insertions(+), 46 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 220bcad..58d8556 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -398,6 +398,9 @@ public:
    vec4_instruction *emit(enum opcode opcode, dst_reg dst,
 			  src_reg src0, src_reg src1, src_reg src2);
 
+   vec4_instruction *emit_before(vec4_instruction *inst,
+				 vec4_instruction *new_inst);
+
    vec4_instruction *MOV(dst_reg dst, src_reg src0);
    vec4_instruction *NOT(dst_reg dst, src_reg src0);
    vec4_instruction *RNDD(dst_reg dst, src_reg src0);
@@ -417,6 +420,9 @@ public:
 			 uint32_t condition);
    vec4_instruction *IF(src_reg src0, src_reg src1, uint32_t condition);
    vec4_instruction *IF(uint32_t predicate);
+   vec4_instruction *PULL_CONSTANT_LOAD(dst_reg dst, src_reg index);
+   vec4_instruction *SCRATCH_READ(dst_reg dst, src_reg index);
+   vec4_instruction *SCRATCH_WRITE(dst_reg dst, src_reg src, src_reg index);
 
    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 			       dst_reg dst,
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 96c5151..2393a42 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -94,6 +94,17 @@ vec4_visitor::emit(vec4_instruction *inst)
 }
 
 vec4_instruction *
+vec4_visitor::emit_before(vec4_instruction *inst, vec4_instruction *new_inst)
+{
+   new_inst->ir = inst->ir;
+   new_inst->annotation = inst->annotation;
+
+   inst->insert_before(new_inst);
+
+   return inst;
+}
+
+vec4_instruction *
 vec4_visitor::emit(enum opcode opcode, dst_reg dst,
 		   src_reg src0, src_reg src1, src_reg src2)
 {
@@ -201,6 +212,32 @@ vec4_visitor::CMP(dst_reg dst, src_reg src0, src_reg src1, uint32_t condition)
    return inst;
 }
 
+vec4_instruction *
+vec4_visitor::SCRATCH_READ(dst_reg dst, src_reg index)
+{
+   vec4_instruction *inst;
+
+   inst = new(mem_ctx) vec4_instruction(this, VS_OPCODE_SCRATCH_READ,
+					dst, index);
+   inst->base_mrf = 14;
+   inst->mlen = 1;
+
+   return inst;
+}
+
+vec4_instruction *
+vec4_visitor::SCRATCH_WRITE(dst_reg dst, src_reg src, src_reg index)
+{
+   vec4_instruction *inst;
+
+   inst = new(mem_ctx) vec4_instruction(this, VS_OPCODE_SCRATCH_WRITE,
+					dst, src, index);
+   inst->base_mrf = 13;
+   inst->mlen = 2;
+
+   return inst;
+}
+
 void
 vec4_visitor::emit_dp(dst_reg dst, src_reg src0, src_reg src1, unsigned elements)
 {
@@ -736,7 +773,7 @@ vec4_visitor::visit(ir_variable *ir)
 
 	 dst_reg dst = *reg;
 	 dst.writemask = (1 << c->key.gl_fixed_input_size[i]) - 1;
-	 emit(BRW_OPCODE_MUL, dst, src_reg(dst), src_reg(1.0f / 65536.0f));
+	 emit(MUL(dst, src_reg(dst), src_reg(1.0f / 65536.0f)));
       }
       break;
 
@@ -1977,17 +2014,9 @@ vec4_visitor::get_scratch_offset(vec4_instruction *inst,
    if (reladdr) {
       src_reg index = src_reg(this, glsl_type::int_type);
 
-      vec4_instruction *add = emit(ADD(dst_reg(index),
-				       *reladdr,
-				       src_reg(reg_offset)));
-      /* Move our new instruction from the tail to its correct place. */
-      add->remove();
-      inst->insert_before(add);
-
-      vec4_instruction *mul = emit(MUL(dst_reg(index),
-				       index, src_reg(message_header_scale)));
-      mul->remove();
-      inst->insert_before(mul);
+      emit_before(inst, ADD(dst_reg(index), *reladdr, src_reg(reg_offset)));
+      emit_before(inst, MUL(dst_reg(index),
+			    index, src_reg(message_header_scale)));
 
       return index;
    } else {
@@ -2002,26 +2031,13 @@ vec4_visitor::get_pull_constant_offset(vec4_instruction *inst,
    if (reladdr) {
       src_reg index = src_reg(this, glsl_type::int_type);
 
-      vec4_instruction *add = new(mem_ctx) vec4_instruction(this, BRW_OPCODE_ADD,
-							    dst_reg(index),
-							    *reladdr,
-							    src_reg(reg_offset));
-      add->ir = inst->ir;
-      add->annotation = inst->annotation;
-      inst->insert_before(add);
+      emit_before(inst, ADD(dst_reg(index), *reladdr, src_reg(reg_offset)));
 
       /* Pre-gen6, the message header uses byte offsets instead of vec4
        * (16-byte) offset units.
        */
       if (intel->gen < 6) {
-	 vec4_instruction *mul = new(mem_ctx) vec4_instruction(this,
-							       BRW_OPCODE_MUL,
-							       dst_reg(index),
-							       index,
-							       src_reg(16));
-	 mul->ir = inst->ir;
-	 mul->annotation = inst->annotation;
-	 inst->insert_before(mul);
+	 emit_before(inst, MUL(dst_reg(index), index, src_reg(16)));
       }
 
       return index;
@@ -2043,14 +2059,7 @@ vec4_visitor::emit_scratch_read(vec4_instruction *inst,
    int reg_offset = base_offset + orig_src.reg_offset;
    src_reg index = get_scratch_offset(inst, orig_src.reladdr, reg_offset);
 
-   vec4_instruction *scratch_read_inst = emit(VS_OPCODE_SCRATCH_READ,
-					      temp, index);
-
-   scratch_read_inst->base_mrf = 14;
-   scratch_read_inst->mlen = 1;
-   /* Move our instruction from the tail to its correct place. */
-   scratch_read_inst->remove();
-   inst->insert_before(scratch_read_inst);
+   emit_before(inst, SCRATCH_READ(temp, index));
 }
 
 /**
@@ -2067,14 +2076,11 @@ vec4_visitor::emit_scratch_write(vec4_instruction *inst,
 
    dst_reg dst = dst_reg(brw_writemask(brw_vec8_grf(0, 0),
 				       orig_dst.writemask));
-   vec4_instruction *scratch_write_inst = emit(VS_OPCODE_SCRATCH_WRITE,
-					       dst, temp, index);
-   scratch_write_inst->base_mrf = 13;
-   scratch_write_inst->mlen = 2;
-   scratch_write_inst->predicate = inst->predicate;
-   /* Move our instruction from the tail to its correct place. */
-   scratch_write_inst->remove();
-   inst->insert_after(scratch_write_inst);
+   vec4_instruction *write = SCRATCH_WRITE(dst, temp, index);
+   write->predicate = inst->predicate;
+   write->ir = inst->ir;
+   write->annotation = inst->annotation;
+   inst->insert_after(write);
 }
 
 /**
@@ -2171,11 +2177,9 @@ vec4_visitor::emit_pull_constant_load(vec4_instruction *inst,
 
    load = new(mem_ctx) vec4_instruction(this, VS_OPCODE_PULL_CONSTANT_LOAD,
 					temp, index);
-   load->annotation = inst->annotation;
-   load->ir = inst->ir;
    load->base_mrf = 14;
    load->mlen = 1;
-   inst->insert_before(load);
+   emit_before(inst, load);
 }
 
 /**



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