Mesa (master): i965: Don't use BRW_DEPTHFORMAT_D24_UNORM_X8_UINT on Gen4.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 9df8662e28ff6b60e5296dc4583372e0771a3263
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9df8662e28ff6b60e5296dc4583372e0771a3263

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Dec 20 15:26:21 2011 -0800

i965: Don't use BRW_DEPTHFORMAT_D24_UNORM_X8_UINT on Gen4.

X8 depth formats weren't supported until Ironlake (Gen 5).

Fixes GPU hangs introduced in d84a180417d1eabd680554970f1eaaa93abcd41e.
One example test case was "fbo-missing-attachment-blit from".

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
Reviewed-by: Eric Anholt <eric at anholt.net>

---

 src/mesa/drivers/dri/i965/brw_misc_state.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 7b13981..e2ac170 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -223,7 +223,10 @@ brw_depthbuffer_format(struct brw_context *brw)
    case MESA_FORMAT_Z32_FLOAT:
       return BRW_DEPTHFORMAT_D32_FLOAT;
    case MESA_FORMAT_X8_Z24:
-      return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT;
+      if (intel->gen >= 5)
+	 return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT;
+      else /* Gen4 doesn't support X8; use S8 instead. */
+	 return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
    case MESA_FORMAT_S8_Z24:
       return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
    case MESA_FORMAT_Z32_FLOAT_X24S8: