Mesa (master): i965: let the if_stack just store the instruction index

[Yuanhan Liu]

Module: Mesa
Branch: master
Commit: 0a17093eaf84696b05d04a45d6d51281f7b2786b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a17093eaf84696b05d04a45d6d51281f7b2786b

Author: Yuanhan Liu <yuanhan.liu at linux.intel.com>
Date:   Wed Dec 21 14:51:59 2011 +0800

i965: let the if_stack just store the instruction index

If dynamic instruction store size is enabled, while after
the brw_IF/ELSE() and before the brw_ENDIF() function, the
eu instruction store base address(p->store) may change.

Thus let if_stack just store the instruction index. This is
somehow more flexible and safe than store the instruction
memory address.

Signed-off-by: Yuanhan Liu <yuanhan.liu at linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_eu.c      |    3 +--
 src/mesa/drivers/dri/i965/brw_eu.h      |    4 +++-
 src/mesa/drivers/dri/i965/brw_eu_emit.c |   22 +++++++++++++++-------
 3 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index 83aae3b..9b4dde8 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -191,8 +191,7 @@ brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
    /* Set up control flow stack */
    p->if_stack_depth = 0;
    p->if_stack_array_size = 16;
-   p->if_stack =
-      rzalloc_array(mem_ctx, struct brw_instruction *, p->if_stack_array_size);
+   p->if_stack = rzalloc_array(mem_ctx, int, p->if_stack_array_size);
 
    p->loop_stack_depth = 0;
    p->loop_stack_array_size = 16;
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 11e7161..c5a119f 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -123,8 +123,10 @@ struct brw_compile {
    /* Control flow stacks:
     * - if_stack contains IF and ELSE instructions which must be patched
     *   (and popped) once the matching ENDIF instruction is encountered.
+    *
+    *   Just store the instruction pointer(an index).
     */
-   struct brw_instruction **if_stack;
+   int *if_stack;
    int if_stack_depth;
    int if_stack_array_size;
 
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 11f4080..a74ffce 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -901,16 +901,23 @@ struct brw_instruction *brw_JMPI(struct brw_compile *p,
 static void
 push_if_stack(struct brw_compile *p, struct brw_instruction *inst)
 {
-   p->if_stack[p->if_stack_depth] = inst;
+   p->if_stack[p->if_stack_depth] = inst - p->store;
 
    p->if_stack_depth++;
    if (p->if_stack_array_size <= p->if_stack_depth) {
       p->if_stack_array_size *= 2;
-      p->if_stack = reralloc(p->mem_ctx, p->if_stack, struct brw_instruction *,
+      p->if_stack = reralloc(p->mem_ctx, p->if_stack, int,
 			     p->if_stack_array_size);
    }
 }
 
+static struct brw_instruction *
+pop_if_stack(struct brw_compile *p)
+{
+   p->if_stack_depth--;
+   return &p->store[p->if_stack[p->if_stack_depth]];
+}
+
 static void
 push_loop_stack(struct brw_compile *p, struct brw_instruction *inst)
 {
@@ -1189,15 +1196,16 @@ brw_ENDIF(struct brw_compile *p)
    struct brw_instruction *insn;
    struct brw_instruction *else_inst = NULL;
    struct brw_instruction *if_inst = NULL;
+   struct brw_instruction *tmp;
 
    /* Pop the IF and (optional) ELSE instructions from the stack */
    p->if_depth_in_loop[p->loop_stack_depth]--;
-   p->if_stack_depth--;
-   if (p->if_stack[p->if_stack_depth]->header.opcode == BRW_OPCODE_ELSE) {
-      else_inst = p->if_stack[p->if_stack_depth];
-      p->if_stack_depth--;
+   tmp = pop_if_stack(p);
+   if (tmp->header.opcode == BRW_OPCODE_ELSE) {
+      else_inst = tmp;
+      tmp = pop_if_stack(p);
    }
-   if_inst = p->if_stack[p->if_stack_depth];
+   if_inst = tmp;
 
    /* In single program flow mode, we can express IF and ELSE instructions
     * equivalently as ADD instructions that operate on IP.  On platforms prior