Mesa (7.11): i965/gen4: Fix message parameter loading for 1D TXD sampling.
Ian Romanick
idr at kemper.freedesktop.org
Thu Jul 28 23:01:32 UTC 2011
Module: Mesa
Branch: 7.11
Commit: dcbd00e73c703e46b8034625c929b1dc5bbb5ca4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dcbd00e73c703e46b8034625c929b1dc5bbb5ca4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jul 25 14:27:07 2011 -0700
i965/gen4: Fix message parameter loading for 1D TXD sampling.
We were neglecting to load dvdx and dvdy. v is not optional.
Fixes glslparsertests tex-grad-0[12345].frag on Broadwater/Crestline.
(We still need an execution test using sampler1D.)
NOTE: This is a candidate for the 7.11 branch.
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 3e1fd13f605f16e8b48f3a9b71910a3c66eb84b5)
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b0a9fd6..96df5ed 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -614,6 +614,8 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
* dPdx = dudx, dvdx, drdx
* dPdy = dudy, dvdy, drdy
*
+ * 1-arg: Does not exist.
+ *
* 2-arg: dudx dvdx dudy dvdy
* dPdx.x dPdx.y dPdy.x dPdy.y
* m4 m5 m6 m7
@@ -625,14 +627,14 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
for (int i = 0; i < ir->lod_info.grad.dPdx->type->vector_elements; i++) {
emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdx);
dPdx.reg_offset++;
- mlen++;
}
+ mlen += MAX2(ir->lod_info.grad.dPdx->type->vector_elements, 2);
for (int i = 0; i < ir->lod_info.grad.dPdy->type->vector_elements; i++) {
emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdy);
dPdy.reg_offset++;
- mlen++;
}
+ mlen += MAX2(ir->lod_info.grad.dPdy->type->vector_elements, 2);
} else {
/* Oh joy. gen4 doesn't have SIMD8 non-shadow-compare bias/lod
* instructions. We'll need to do SIMD16 here.
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