Mesa (nvc0): nv50: check grclass instead of chipset for 3D caps

[Christoph Bumiller]

Module: Mesa
Branch: nvc0
Commit: 3bf92a281bdc6ebf2ec5975729d02bd9062e11f5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3bf92a281bdc6ebf2ec5975729d02bd9062e11f5

Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date:   Thu Mar  3 12:31:35 2011 +0100

nv50: check grclass instead of chipset for 3D caps

---

 src/gallium/drivers/nv50/nv50_screen.c |    4 ++--
 src/gallium/drivers/nv50/nv50_state.c  |    6 ++----
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index 3ccaff2..ae0365e 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -59,7 +59,7 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen,
 
    switch (format) {
    case PIPE_FORMAT_Z16_UNORM:
-      if ((nouveau_screen(pscreen)->device->chipset & 0xf0) != 0xa0)
+      if (nv50_screen(pscreen)->tesla->grclass < NVA0_3D)
          return FALSE;
       break;
    default:
@@ -117,7 +117,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_INDEP_BLEND_ENABLE:
       return 1;
    case PIPE_CAP_INDEP_BLEND_FUNC:
-      return nv50_screen(pscreen)->base.device->chipset >= 0xa3;
+      return nv50_screen(pscreen)->tesla->grclass >= NVA3_3D;
    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
       return 1;
diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c
index 2f6fdb4..3d6423b 100644
--- a/src/gallium/drivers/nv50/nv50_state.c
+++ b/src/gallium/drivers/nv50/nv50_state.c
@@ -90,9 +90,7 @@ nv50_blend_state_create(struct pipe_context *pipe,
    int i;
    boolean emit_common_func = cso->rt[0].blend_enable;
 
-   const uint32_t chipset = nv50_context(pipe)->screen->base.device->chipset;
-
-   if (chipset >= 0xa3) {
+   if (nv50_context(pipe)->screen->tesla->grclass >= NVA3_3D) {
       SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1);
       SB_DATA    (so, cso->independent_blend_enable);
    }
@@ -107,7 +105,7 @@ nv50_blend_state_create(struct pipe_context *pipe,
             emit_common_func = TRUE;
       }
 
-      if (chipset >= 0xa3) {
+      if (nv50_context(pipe)->screen->tesla->grclass >= NVA3_3D) {
          emit_common_func = FALSE;
 
          for (i = 0; i < 8; ++i) {