Mesa (master): i965: Reverse the operands for INT DIV prior to Gen6.

Kenneth Graunke kwg at kemper.freedesktop.org
Sun Oct 2 17:02:37 PDT 2011


Module: Mesa
Branch: master
Commit: b9af592dfa8f8d0fe9f29c2d48bf6846cbd5c50f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9af592dfa8f8d0fe9f29c2d48bf6846cbd5c50f

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Sep 28 17:37:56 2011 -0700

i965: Reverse the operands for INT DIV prior to Gen6.

Apparently on Gen4 and 5, the denominator comes first.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Tested-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Eric Anholt <eric at anholt.net>

---

 src/mesa/drivers/dri/i965/brw_fs.cpp        |   17 +++++++++++++++--
 src/mesa/drivers/dri/i965/brw_vec4_emit.cpp |   17 +++++++++++++++--
 2 files changed, 30 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1d93a51..2000180 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -610,8 +610,21 @@ fs_visitor::emit_math(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
 
       inst = emit(opcode, dst, src0, src1);
    } else {
-      emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + 1, src1.type), src1);
-      inst = emit(opcode, dst, src0, reg_null_f);
+      /* From the Ironlake PRM, Volume 4, Part 1, Section 6.1.13
+       * "Message Payload":
+       *
+       * "Operand0[7].  For the INT DIV functions, this operand is the
+       *  denominator."
+       *  ...
+       * "Operand1[7].  For the INT DIV functions, this operand is the
+       *  numerator."
+       */
+      bool is_int_div = opcode != SHADER_OPCODE_POW;
+      fs_reg &op0 = is_int_div ? src1 : src0;
+      fs_reg &op1 = is_int_div ? src0 : src1;
+
+      emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + 1, op1.type), op1);
+      inst = emit(opcode, dst, op0, reg_null_f);
 
       inst->base_mrf = base_mrf;
       inst->mlen = 2 * c->dispatch_width / 8;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index c080dfd..5cbbda8 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -307,14 +307,27 @@ vec4_visitor::generate_math2_gen4(vec4_instruction *inst,
 				  struct brw_reg src0,
 				  struct brw_reg src1)
 {
-   brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), src1.type), src1);
+   /* From the Ironlake PRM, Volume 4, Part 1, Section 6.1.13
+    * "Message Payload":
+    *
+    * "Operand0[7].  For the INT DIV functions, this operand is the
+    *  denominator."
+    *  ...
+    * "Operand1[7].  For the INT DIV functions, this operand is the
+    *  numerator."
+    */
+   bool is_int_div = inst->opcode != SHADER_OPCODE_POW;
+   struct brw_reg &op0 = is_int_div ? src1 : src0;
+   struct brw_reg &op1 = is_int_div ? src0 : src1;
+
+   brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), op1.type), op1);
 
    brw_math(p,
 	    dst,
 	    brw_math_function(inst->opcode),
 	    BRW_MATH_SATURATE_NONE,
 	    inst->base_mrf,
-	    src0,
+	    op0,
 	    BRW_MATH_DATA_VECTOR,
 	    BRW_MATH_PRECISION_FULL);
 }



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