Mesa (master): radeon: Simplify cliprects computation now that there' s just 1.

Eric Anholt anholt at kemper.freedesktop.org
Fri Oct 28 11:39:38 PDT 2011


Module: Mesa
Branch: master
Commit: 339c1731c346f21bf212e4d94d57d09d8cbfc9f4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=339c1731c346f21bf212e4d94d57d09d8cbfc9f4

Author: Eric Anholt <eric at anholt.net>
Date:   Fri Oct 14 13:52:31 2011 -0700

radeon: Simplify cliprects computation now that there's just 1.

This can probably be reduced even further by moving this logic to the
scissor state update or just removing the logic entirely, but I don't
trust myself in radeon quite that much.

---

 src/mesa/drivers/dri/radeon/radeon_common.c        |   76 ++++----------------
 src/mesa/drivers/dri/radeon/radeon_common.h        |    4 -
 .../drivers/dri/radeon/radeon_common_context.h     |    4 +-
 3 files changed, 15 insertions(+), 69 deletions(-)

diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index 64a7c3f..c7ba2af 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -90,24 +90,18 @@ static GLboolean intersect_rect(drm_clip_rect_t * out,
 
 void radeonRecalcScissorRects(radeonContextPtr radeon)
 {
-	drm_clip_rect_t *out;
-	int i;
-
-	/* Grow cliprect store?
-	 */
-	if (radeon->state.scissor.numAllocedClipRects < radeon->numClipRects) {
-		while (radeon->state.scissor.numAllocedClipRects <
-		       radeon->numClipRects) {
-			radeon->state.scissor.numAllocedClipRects += 1;	/* zero case */
-			radeon->state.scissor.numAllocedClipRects *= 2;
-		}
+	struct gl_context *ctx = radeon->glCtx;
+	drm_clip_rect_t bounds;
 
-		if (radeon->state.scissor.pClipRects)
-			FREE(radeon->state.scissor.pClipRects);
+	bounds.x1 = 0;
+	bounds.y1 = 0;
+	bounds.x2 = ctx->DrawBuffer->Width;
+	bounds.x2 = ctx->DrawBuffer->Height;
 
+	if (!radeon->state.scissor.numAllocedClipRects) {
+		radeon->state.scissor.numAllocedClipRects = 1;
 		radeon->state.scissor.pClipRects =
-			MALLOC(radeon->state.scissor.numAllocedClipRects *
-			       sizeof(drm_clip_rect_t));
+			MALLOC(sizeof(drm_clip_rect_t));
 
 		if (radeon->state.scissor.pClipRects == NULL) {
 			radeon->state.scissor.numAllocedClipRects = 0;
@@ -115,54 +109,17 @@ void radeonRecalcScissorRects(radeonContextPtr radeon)
 		}
 	}
 
-	out = radeon->state.scissor.pClipRects;
 	radeon->state.scissor.numClipRects = 0;
-
-	for (i = 0; i < radeon->numClipRects; i++) {
-		if (intersect_rect(out,
-				   &radeon->pClipRects[i],
-				   &radeon->state.scissor.rect)) {
-			radeon->state.scissor.numClipRects++;
-			out++;
-		}
+	if (intersect_rect(radeon->state.scissor.pClipRects,
+			   &bounds,
+			   &radeon->state.scissor.rect)) {
+		radeon->state.scissor.numClipRects = 1;
 	}
 
 	if (radeon->vtbl.update_scissor)
 	   radeon->vtbl.update_scissor(radeon->glCtx);
 }
 
-void radeon_get_cliprects(radeonContextPtr radeon,
-			  struct drm_clip_rect **cliprects,
-			  unsigned int *num_cliprects,
-			  int *x_off, int *y_off)
-{
-	__DRIdrawable *dPriv = radeon_get_drawable(radeon);
-	struct radeon_framebuffer *rfb = dPriv->driverPrivate;
-
-	if (radeon->constant_cliprect) {
-		radeon->fboRect.x1 = 0;
-		radeon->fboRect.y1 = 0;
-		radeon->fboRect.x2 = radeon->glCtx->DrawBuffer->Width;
-		radeon->fboRect.y2 = radeon->glCtx->DrawBuffer->Height;
-
-		*cliprects = &radeon->fboRect;
-		*num_cliprects = 1;
-		*x_off = 0;
-		*y_off = 0;
-	} else if (radeon->front_cliprects ||
-		   rfb->pf_active || dPriv->numBackClipRects == 0) {
-		*cliprects = dPriv->pClipRects;
-		*num_cliprects = dPriv->numClipRects;
-		*x_off = dPriv->x;
-		*y_off = dPriv->y;
-	} else {
-		*num_cliprects = dPriv->numBackClipRects;
-		*cliprects = dPriv->pBackClipRects;
-		*x_off = dPriv->backX;
-		*y_off = dPriv->backY;
-	}
-}
-
 /**
  * Update cliprects and scissors.
  */
@@ -176,10 +133,6 @@ void radeonSetCliprects(radeonContextPtr radeon)
 
 	struct radeon_framebuffer *const draw_rfb = drawable->driverPrivate;
 	struct radeon_framebuffer *const read_rfb = readable->driverPrivate;
-	int x_off, y_off;
-
-	radeon_get_cliprects(radeon, &radeon->pClipRects,
-			     &radeon->numClipRects, &x_off, &y_off);
 
 	if ((draw_rfb->base.Width != drawable->w) ||
 	    (draw_rfb->base.Height != drawable->h)) {
@@ -766,8 +719,7 @@ int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller)
 	rmesa->cmdbuf.flushing = 1;
 
 	if (RADEON_DEBUG & RADEON_IOCTL) {
-		fprintf(stderr, "%s from %s - %i cliprects\n",
-			__FUNCTION__, caller, rmesa->numClipRects);
+		fprintf(stderr, "%s from %s\n", __FUNCTION__, caller);
 	}
 
 	radeonEmitQueryEnd(rmesa->glCtx);
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index 344250e..67925cb 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -25,10 +25,6 @@ void radeon_draw_buffer(struct gl_context *ctx, struct gl_framebuffer *fb);
 void radeonDrawBuffer( struct gl_context *ctx, GLenum mode );
 void radeonReadBuffer( struct gl_context *ctx, GLenum mode );
 void radeon_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei width, GLsizei height);
-void radeon_get_cliprects(radeonContextPtr radeon,
-			  struct drm_clip_rect **cliprects,
-			  unsigned int *num_cliprects,
-			  int *x_off, int *y_off);
 void radeon_fbo_init(struct radeon_context *radeon);
 void
 radeon_renderbuffer_set_bo(struct radeon_renderbuffer *rb,
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ef39913..2b478e1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -457,9 +457,7 @@ struct radeon_context {
    GLuint NewGLState;
    DECLARE_RENDERINPUTS(tnl_index_bitset);	/* index of bits for last tnl_install_attrs */
 
-   /* Drawable, cliprect and scissor information */
-   GLuint numClipRects;	/* Cliprects for the draw buffer */
-   drm_clip_rect_t *pClipRects;
+   /* Drawable information */
    unsigned int lastStamp;
    drm_radeon_sarea_t *sarea;	/* Private SAREA data */
 



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