Mesa (master): gallium/docs: document the new vertex fetch CAPs

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 1781d26faa6bf13950b95be97b6510e8f13290d6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1781d26faa6bf13950b95be97b6510e8f13290d6

Author: Marek Olšák <maraeo at gmail.com>
Date:   Tue Apr 24 23:10:46 2012 +0200

gallium/docs: document the new vertex fetch CAPs

---

 src/gallium/docs/source/screen.rst |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index 751eda3..05f7e8f 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -98,6 +98,18 @@ The integer capabilities:
   equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
 * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
   the flatshade_first setting in ``pipe_rasterizer_state``.
+* ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
+  buffers.  If not, the state tracker must upload all data which is not in hw
+  resources.
+* ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
+  limitation.  If true, pipe_vertex_buffer::buffer_offset must always be aligned
+  to 4.  If false, there are no restrictions on the offset.
+* ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
+  limitation.  If true, pipe_vertex_buffer::stride must always be aligned to 4.
+  If false, there are no restrictions on the stride.
+* ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
+  a hw limitation.  If true, pipe_vertex_element::src_offset must always be
+  aligned to 4.  If false, there are no restrictions on src_offset.