Mesa (8.0): r600g: fix typo in evergreen register
Dave Airlie
airlied at kemper.freedesktop.org
Mon Jan 23 09:53:57 UTC 2012
Module: Mesa
Branch: 8.0
Commit: e1a02333a0d26ce3d8631e701fc3960b35e6aeb5
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1a02333a0d26ce3d8631e701fc3960b35e6aeb5
Author: Alex Deucher <alexander.deucher at amd.com>
Date: Thu Jan 19 21:07:58 2012 -0500
r600g: fix typo in evergreen register
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
(cherry picked from commit 5e576efef2397e6748e0dc727d92d1064bf90efe)
---
src/gallium/drivers/r600/evergreend.h | 13 ++++++-------
1 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index 17dee1a..fa3fece 100644
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -675,13 +675,6 @@
#define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1)
#define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF
-#define R_028004_DB_DEPTH_VIEW 0x028004
-#define S_028004_SLICE_START(x) (((x) & 0x7FF) << 0)
-#define G_028004_SLICE_START(x) (((x) >> 0) & 0x7FF)
-#define C_028004_SLICE_START 0xFFFFF800
-#define S_028004_SLICE_MAX(x) (((x) & 0x7FF) << 13)
-#define G_028004_SLICE_MAX(x) (((x) >> 13) & 0x7FF)
-#define C_028004_SLICE_MAX 0xFF001FFF
#define R_028D24_DB_HTILE_SURFACE 0x028D24
#define S_028D24_HTILE_WIDTH(x) (((x) & 0x1) << 0)
#define G_028D24_HTILE_WIDTH(x) (((x) >> 0) & 0x1)
@@ -1469,6 +1462,12 @@
#define S_028004_ZPASS_INCREMENT_DISABLE (((x) & 0x1) << 0)
#define S_028004_PERFECT_ZPASS_COUNTS(x) (((x) & 0x1) << 1)
#define R_028008_DB_DEPTH_VIEW 0x00028008
+#define S_028008_SLICE_START(x) (((x) & 0x7FF) << 0)
+#define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF)
+#define C_028008_SLICE_START 0xFFFFF800
+#define S_028008_SLICE_MAX(x) (((x) & 0x7FF) << 13)
+#define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF)
+#define C_028008_SLICE_MAX 0xFF001FFF
#define R_02800C_DB_RENDER_OVERRIDE 0x0002800C
#define V_02800C_FORCE_OFF 0
#define V_02800C_FORCE_ENABLE 1
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