Mesa (master): intel: Pass the gl_renderbuffer to render_target_supported() vtable method.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 796f44d77906342e5912e7da6bdba1ba86bab9f0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=796f44d77906342e5912e7da6bdba1ba86bab9f0

Author: Eric Anholt <eric at anholt.net>
Date:   Thu Jan 19 17:23:25 2012 -0800

intel: Pass the gl_renderbuffer to render_target_supported() vtable method.

I'm going to want to go looking at it for an integer texture fix.

NOTE: This is a candidate for the 8.0 branch.

---

 src/mesa/drivers/dri/i915/i830_vtbl.c             |    5 ++++-
 src/mesa/drivers/dri/i915/i915_vtbl.c             |    5 ++++-
 src/mesa/drivers/dri/i965/brw_wm.h                |    3 ++-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |    8 ++++----
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |    2 +-
 src/mesa/drivers/dri/intel/intel_context.h        |    2 +-
 src/mesa/drivers/dri/intel/intel_fbo.c            |    2 +-
 7 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 082372e..8b25596 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -592,8 +592,11 @@ static uint32_t i830_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] =
 };
 
 static bool
-i830_render_target_supported(struct intel_context *intel, gl_format format)
+i830_render_target_supported(struct intel_context *intel,
+			     struct gl_renderbuffer *rb)
 {
+   gl_format format = rb->Format;
+
    if (format == MESA_FORMAT_S8_Z24 ||
        format == MESA_FORMAT_X8_Z24 ||
        format == MESA_FORMAT_Z16) {
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 62bfa0a..11e8a35 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -557,8 +557,11 @@ static uint32_t i915_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] =
 };
 
 static bool
-i915_render_target_supported(struct intel_context *intel, gl_format format)
+i915_render_target_supported(struct intel_context *intel,
+			     struct gl_renderbuffer *rb)
 {
+   gl_format format = rb->Format;
+
    if (format == MESA_FORMAT_S8_Z24 ||
        format == MESA_FORMAT_X8_Z24 ||
        format == MESA_FORMAT_Z16) {
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 3bce1f3..8f1cb8c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -472,7 +472,8 @@ struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint typ
 struct gl_shader_program *brw_new_shader_program(struct gl_context *ctx, GLuint name);
 
 bool brw_color_buffer_write_enabled(struct brw_context *brw);
-bool brw_render_target_supported(struct intel_context *intel, gl_format format);
+bool brw_render_target_supported(struct intel_context *intel,
+				 struct gl_renderbuffer *rb);
 void brw_wm_payload_setup(struct brw_context *brw,
 			  struct brw_wm_compile *c);
 bool do_wm_prog(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index c77d83a..bdce057 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -557,12 +557,12 @@ brw_init_surface_formats(struct brw_context *brw)
 }
 
 bool
-brw_render_target_supported(struct intel_context *intel, gl_format format)
+brw_render_target_supported(struct intel_context *intel,
+			    struct gl_renderbuffer *rb)
 {
    struct brw_context *brw = brw_context(&intel->ctx);
-   /* Not exactly true, as some of those formats are not renderable.
-    * But at least we know how to translate them.
-    */
+   gl_format format = rb->Format;
+
    return brw->format_supported_as_render_target[format];
 }
 
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index d429adc..1efb82f 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -221,7 +221,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
 	 surf->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
       break;
    default:
-      assert(brw_render_target_supported(intel, rb_format));
+      assert(brw_render_target_supported(intel, rb));
       surf->ss0.surface_format = brw->render_target_format[rb_format];
       if (unlikely(!brw->format_supported_as_render_target[rb_format])) {
 	 _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n",
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index e673a4e..4d4e030 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -153,7 +153,7 @@ struct intel_context
 
       void (*debug_batch)(struct intel_context *intel);
       bool (*render_target_supported)(struct intel_context *intel,
-				      gl_format format);
+				      struct gl_renderbuffer *rb);
 
       /** Can HiZ be enabled on a depthbuffer of the given format? */
       bool (*is_hiz_depth_format)(struct intel_context *intel,
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index f4a25a1..2ba43ac 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -769,7 +769,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
 	 continue;
       }
 
-      if (!intel->vtbl.render_target_supported(intel, intel_rb_format(irb))) {
+      if (!intel->vtbl.render_target_supported(intel, rb)) {
 	 DBG("Unsupported HW texture/renderbuffer format attached: %s\n",
 	     _mesa_get_format_name(intel_rb_format(irb)));
 	 fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;