Mesa (master): radeon/llvm: fix live-in handling for inputs

[Vadim Girlin]

Module: Mesa
Branch: master
Commit: e3e7ae732c903235a57760e10de542f128c1fe62
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3e7ae732c903235a57760e10de542f128c1fe62

Author: Vadim Girlin <vadimgirlin at gmail.com>
Date:   Mon May  7 17:38:01 2012 +0400

radeon/llvm: fix live-in handling for inputs

Set the input registers as live-in for entry basic block.

Signed-off-by: Vadim Girlin <vadimgirlin at gmail.com>

---

 src/gallium/drivers/radeon/AMDGPUUtil.cpp          |    1 +
 .../drivers/radeon/R600LowerShaderInstructions.cpp |    4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/AMDGPUUtil.cpp b/src/gallium/drivers/radeon/AMDGPUUtil.cpp
index 6fb01b6..663a77f 100644
--- a/src/gallium/drivers/radeon/AMDGPUUtil.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUUtil.cpp
@@ -118,6 +118,7 @@ void AMDGPU::utilAddLiveIn(MachineFunction * MF, MachineRegisterInfo & MRI,
 {
     if (!MRI.isLiveIn(physReg)) {
       MRI.addLiveIn(physReg, virtReg);
+      MF->front().addLiveIn(physReg);
       BuildMI(MF->front(), MF->front().begin(), DebugLoc(),
                            TII->get(TargetOpcode::COPY), virtReg)
             .addReg(physReg);
diff --git a/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp b/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp
index 394ee70..742b50f 100644
--- a/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp
+++ b/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp
@@ -13,6 +13,7 @@
 
 #include "AMDGPU.h"
 #include "AMDGPULowerShaderInstructions.h"
+#include "AMDGPUUtil.h"
 #include "AMDIL.h"
 #include "AMDILInstrInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
@@ -117,8 +118,7 @@ void R600LowerShaderInstructionsPass::lowerLOAD_INPUT(MachineInstr &MI)
   unsigned newRegister = inputClass->getRegister(inputIndex);
   unsigned dstReg = dst.getReg();
 
-  preloadRegister(MI.getParent()->getParent(), TM.getInstrInfo(), newRegister,
-                  dstReg);
+  AMDGPU::utilAddLiveIn(MI.getParent()->getParent(), *MRI, TM.getInstrInfo(), newRegister, dstReg);
 }
 
 bool R600LowerShaderInstructionsPass::lowerSTORE_OUTPUT(MachineInstr &MI,