Mesa (master): i965: Expose surface setup internals for use by blits.

[Paul Berry]

Module: Mesa
Branch: master
Commit: 36e34134184e72532f2e6a2b9438f72284ac3057
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=36e34134184e72532f2e6a2b9438f72284ac3057

Author: Paul Berry <stereotype441 at gmail.com>
Date:   Thu Apr 26 18:01:01 2012 -0700

i965: Expose surface setup internals for use by blits.

This patch exposes the functions brw_get_surface_tiling_bits and
gen7_set_surface_tiling, so that they can be re-used when setting up
surface states in gen6_blorp.cpp and gen7_blorp.cpp.

Reviewed-by: Chad Versace <chad.versace at linux.intel.com>

---

 src/mesa/drivers/dri/i965/brw_state.h             |    2 ++
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |    2 +-
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |    2 +-
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 659cb0a..9e37361 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -180,6 +180,7 @@ void *brw_state_batch(struct brw_context *brw,
 
 /* brw_wm_surface_state.c */
 void gen4_init_vtable_surface_functions(struct brw_context *brw);
+uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 void brw_create_constant_surface(struct brw_context *brw,
 				 drm_intel_bo *bo,
 				 int width,
@@ -195,6 +196,7 @@ GLuint translate_tex_format(gl_format mesa_format,
 			    GLenum srgb_decode);
 
 /* gen7_wm_surface_state.c */
+void gen7_set_surface_tiling(struct gen7_surface_state *surf, uint32_t tiling);
 void gen7_init_vtable_surface_functions(struct brw_context *brw);
 void gen7_create_constant_surface(struct brw_context *brw,
 				  drm_intel_bo *bo,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 0bb9414..104d475 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -620,7 +620,7 @@ translate_tex_format(gl_format mesa_format,
    }
 }
 
-static uint32_t
+uint32_t
 brw_get_surface_tiling_bits(uint32_t tiling)
 {
    switch (tiling) {
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 8f62c04..d84e075 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -35,7 +35,7 @@
 #include "brw_defines.h"
 #include "brw_wm.h"
 
-static void
+void
 gen7_set_surface_tiling(struct gen7_surface_state *surf, uint32_t tiling)
 {
    switch (tiling) {