Mesa (master): radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes

[Tom Stellard]

Module: Mesa
Branch: master
Commit: 86dfae1103faa9e0329e68e3ab7c1684a0c12892
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=86dfae1103faa9e0329e68e3ab7c1684a0c12892

Author: Tom Stellard <thomas.stellard at amd.com>
Date:   Wed May 23 12:10:10 2012 -0400

radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes

Support for these was inadvertently dropped in commit
cee23ab246f22210b3063cdc47bdb45b3d943526

---

 src/gallium/drivers/radeon/R600InstrInfo.cpp |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/src/gallium/drivers/radeon/R600InstrInfo.cpp b/src/gallium/drivers/radeon/R600InstrInfo.cpp
index af106b2..6840015 100644
--- a/src/gallium/drivers/radeon/R600InstrInfo.cpp
+++ b/src/gallium/drivers/radeon/R600InstrInfo.cpp
@@ -73,11 +73,17 @@ unsigned R600InstrInfo::getISAOpcode(unsigned opcode) const
       return AMDIL::SETE_INT;
     case AMDIL::INE:
       return AMDIL::SETNE_INT;
+    case AMDIL::IGE:
+      return AMDIL::SETGE_INT;
     case AMDIL::MOVE_f32:
     case AMDIL::MOVE_i32:
       return AMDIL::MOV;
     case AMDIL::SHR_i32:
       return getASHRop();
+    case AMDIL::UGE:
+      return AMDIL::SETGE_UINT;
+    case AMDIL::UGT:
+      return AMDIL::SETGT_UINT;
     case AMDIL::USHR_i32:
       return getLSHRop();
   }