Mesa (master): i965/vs: Add a little bit of IR-level debug ability.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 914d8f9f84a3539758716d676d59a1fee4cc559f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=914d8f9f84a3539758716d676d59a1fee4cc559f

Author: Eric Anholt <eric at anholt.net>
Date:   Wed Oct  3 16:11:26 2012 -0700

i965/vs: Add a little bit of IR-level debug ability.

This is super basic, but it let me visualize a problem I had with
opt_compute_to_mrf().

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_context.h |    8 +++
 src/mesa/drivers/dri/i965/brw_disasm.c  |    7 +--
 src/mesa/drivers/dri/i965/brw_vec4.cpp  |   83 +++++++++++++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_vec4.h    |    3 +
 4 files changed, 96 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index eae41d1..e9d6cc4 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1298,6 +1298,14 @@ brw_program_reloc(struct brw_context *brw, uint32_t state_offset,
 bool brw_do_cubemap_normalize(struct exec_list *instructions);
 bool brw_lower_texture_gradients(struct exec_list *instructions);
 
+struct opcode_desc {
+    char    *name;
+    int	    nsrc;
+    int	    ndst;
+};
+
+extern const struct opcode_desc opcode_descs[128];
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 59a4246..9246dee 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -32,11 +32,7 @@
 #include "brw_context.h"
 #include "brw_defines.h"
 
-static const struct {
-    char    *name;
-    int	    nsrc;
-    int	    ndst;
-} opcode[128] = {
+const struct opcode_desc opcode_descs[128] = {
     [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
@@ -91,6 +87,7 @@ static const struct {
     [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
     [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
 };
+static const struct opcode_desc *opcode = opcode_descs;
 
 static const char * const conditional_modifier[16] = {
     [BRW_CONDITIONAL_NONE] = "",
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index e0b6432..727d980 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -925,4 +925,87 @@ vec4_visitor::split_virtual_grfs()
    this->live_intervals_valid = false;
 }
 
+void
+vec4_visitor::dump_instruction(vec4_instruction *inst)
+{
+   if (inst->opcode < ARRAY_SIZE(opcode_descs) &&
+       opcode_descs[inst->opcode].name) {
+      printf("%s ", opcode_descs[inst->opcode].name);
+   } else {
+      printf("op%d ", inst->opcode);
+   }
+
+   switch (inst->dst.file) {
+   case GRF:
+      printf("vgrf%d.%d", inst->dst.reg, inst->dst.reg_offset);
+      break;
+   case MRF:
+      printf("m%d", inst->dst.reg);
+      break;
+   case BAD_FILE:
+      printf("(null)");
+      break;
+   default:
+      printf("???");
+      break;
+   }
+   if (inst->dst.writemask != WRITEMASK_XYZW) {
+      printf(".");
+      if (inst->dst.writemask & 1)
+         printf("x");
+      if (inst->dst.writemask & 2)
+         printf("y");
+      if (inst->dst.writemask & 4)
+         printf("z");
+      if (inst->dst.writemask & 8)
+         printf("w");
+   }
+   printf(", ");
+
+   for (int i = 0; i < 3; i++) {
+      switch (inst->src[i].file) {
+      case GRF:
+         printf("vgrf%d", inst->src[i].reg);
+         break;
+      case ATTR:
+         printf("attr%d", inst->src[i].reg);
+         break;
+      case UNIFORM:
+         printf("u%d", inst->src[i].reg);
+         break;
+      case BAD_FILE:
+         printf("(null)");
+         break;
+      default:
+         printf("???");
+         break;
+      }
+
+      if (inst->src[i].reg_offset)
+         printf(".%d", inst->src[i].reg_offset);
+
+      static const char *chans[4] = {"x", "y", "z", "w"};
+      printf(".");
+      for (int c = 0; c < 4; c++) {
+         printf(chans[BRW_GET_SWZ(inst->src[i].swizzle, c)]);
+      }
+
+      if (i < 3)
+         printf(", ");
+   }
+
+   printf("\n");
+}
+
+void
+vec4_visitor::dump_instructions()
+{
+   int ip = 0;
+   foreach_list_safe(node, &this->instructions) {
+      vec4_instruction *inst = (vec4_instruction *)node;
+      printf("%d: ", ip++);
+      dump_instruction(inst);
+   }
+}
+
 } /* namespace brw */
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 4fdede3..de0df55 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -482,6 +482,9 @@ public:
 				    struct brw_reg dst,
 				    struct brw_reg index,
 				    struct brw_reg offset);
+
+   void dump_instruction(vec4_instruction *inst);
+   void dump_instructions();
 };
 
 } /* namespace brw */