Mesa (master): r600g: there are 16 const buffer size regs for each shader stage

[Alex Deucher]

Module: Mesa
Branch: master
Commit: d781f0c73cf47aee7f660d9b859a6c473293be62
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d781f0c73cf47aee7f660d9b859a6c473293be62

Author: Alex Deucher <alexander.deucher at amd.com>
Date:   Tue Oct 23 11:58:54 2012 -0400

r600g: there are 16 const buffer size regs for each shader stage

we were previously only setting 8 of them.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Marek Olšák <maraeo at gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

---

 src/gallium/drivers/r600/evergreen_state.c |   21 +++++++++++++++++++--
 1 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 0d02d52..29e6822 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -3011,7 +3011,7 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
 	r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
 
 	/* to avoid GPU doing any preloading of constant from random address */
-	r600_store_context_reg_seq(cb, R_028140_ALU_CONST_BUFFER_SIZE_PS_0, 8);
+	r600_store_context_reg_seq(cb, R_028140_ALU_CONST_BUFFER_SIZE_PS_0, 16);
 	r600_store_value(cb, 0); /* R_028140_ALU_CONST_BUFFER_SIZE_PS_0 */
 	r600_store_value(cb, 0);
 	r600_store_value(cb, 0);
@@ -3020,7 +3020,16 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
 	r600_store_value(cb, 0);
 	r600_store_value(cb, 0);
 	r600_store_value(cb, 0);
-	r600_store_context_reg_seq(cb, R_028180_ALU_CONST_BUFFER_SIZE_VS_0, 8);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+
+	r600_store_context_reg_seq(cb, R_028180_ALU_CONST_BUFFER_SIZE_VS_0, 16);
 	r600_store_value(cb, 0); /* R_028180_ALU_CONST_BUFFER_SIZE_VS_0 */
 	r600_store_value(cb, 0);
 	r600_store_value(cb, 0);
@@ -3029,6 +3038,14 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
 	r600_store_value(cb, 0);
 	r600_store_value(cb, 0);
 	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
+	r600_store_value(cb, 0);
 
 	r600_store_context_reg_seq(cb, R_028B94_VGT_STRMOUT_CONFIG, 2);
 	r600_store_value(cb, 0); /* R_028B94_VGT_STRMOUT_CONFIG */