Mesa (master): i965/fs: Clean up the setup of gen4 simd16 message destinations.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 8edc7cbe645b650bcb4e7fa190c9322c289ec177
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8edc7cbe645b650bcb4e7fa190c9322c289ec177

Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 18 11:26:17 2013 -0700

i965/fs: Clean up the setup of gen4 simd16 message destinations.

I think this makes it much more obvious what's going on here.

NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |    9 ++++-----
 1 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index d267316..5d11e67 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -916,11 +916,10 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
        * this weirdness around to the expected layout.
        */
       orig_dst = dst;
-      const glsl_type *vec_type =
-	 glsl_type::get_instance(ir->type->base_type, 4, 1);
-      dst = fs_reg(this, glsl_type::get_array_instance(vec_type, 2));
-      dst.type = intel->is_g4x ? brw_type_for_base_type(ir->type)
-			       : BRW_REGISTER_TYPE_F;
+      dst = fs_reg(GRF, virtual_grf_alloc(8),
+                   (intel->is_g4x ?
+                    brw_type_for_base_type(ir->type) :
+                    BRW_REGISTER_TYPE_F));
    }
 
    fs_inst *inst = NULL;