Mesa (master): radeonsi: Always pre-load separate VGPRs for centroid vs. center interpolation
Michel Dänzer
daenzer at kemper.freedesktop.org
Tue Aug 20 17:08:46 UTC 2013
Module: Mesa
Branch: master
Commit: be301f707e8c6ba3bb0574e64a0a4f1653af8fb7
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=be301f707e8c6ba3bb0574e64a0a4f1653af8fb7
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Mon Aug 19 15:45:32 2013 +0200
radeonsi: Always pre-load separate VGPRs for centroid vs. center interpolation
The LLVM R600 backend currently always uses separate VGPRs for these.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68162
(Centroid interpolation is identical to center interpolation without
multisampling, so the shader hardware was only pre-loading one set of
interpolation coefficients, and the pixel shader code was using
uninitialized values as the centroid interpolation coefficients)
Cc: mesa-stable at lists.freedesktop.org
Tested-by: Laurent Carlier <lordheavym at gmail.com>
---
src/gallium/drivers/radeonsi/si_state_draw.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 7ecaf77..15cb87f 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -183,7 +183,8 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
exports_ps = 2;
}
- spi_ps_in_control = S_0286D8_NUM_INTERP(shader->shader.ninterp);
+ spi_ps_in_control = S_0286D8_NUM_INTERP(shader->shader.ninterp) |
+ S_0286D8_BC_OPTIMIZE_DISABLE(1);
si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl);
spi_ps_input_ena = shader->spi_ps_input_ena;
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