Mesa (master): r300g: enable MSAA on r300-r400, be careful about using color compression

[Marek Olšák]

Module: Mesa
Branch: master
Commit: adb93e3bda13ed539f383787c09f948d0f27fbcb
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=adb93e3bda13ed539f383787c09f948d0f27fbcb

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Aug 11 02:15:12 2013 +0200

r300g: enable MSAA on r300-r400, be careful about using color compression

MSAA was tested by one user on RS690 and it works for him with color
compression (CMASK) disabled. Our theory is that his chipset lacks CMASK RAM.

Since we don't have hardware documentation about which chipsets actually have
CMASK RAM, I had to take a guess based on the presence of HiZ.

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

---

 src/gallium/drivers/r300/r300_chipset.c      |    8 ++++++++
 src/gallium/drivers/r300/r300_chipset.h      |    2 ++
 src/gallium/drivers/r300/r300_screen.c       |    5 -----
 src/gallium/drivers/r300/r300_texture_desc.c |    4 ++++
 4 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c
index 30e085a..c1f5e3c 100644
--- a/src/gallium/drivers/r300/r300_chipset.c
+++ b/src/gallium/drivers/r300/r300_chipset.c
@@ -84,6 +84,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps)
     caps->num_vert_fpus = 0;
     caps->hiz_ram = 0;
     caps->zmask_ram = 0;
+    caps->has_cmask = FALSE;
 
 
     switch (caps->family) {
@@ -91,6 +92,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps)
     case CHIP_R350:
         caps->high_second_pipe = TRUE;
         caps->num_vert_fpus = 4;
+        caps->has_cmask = TRUE; /* guessed because there is also HiZ */
         caps->hiz_ram = R300_HIZ_LIMIT;
         caps->zmask_ram = PIPE_ZMASK_SIZE;
         break;
@@ -105,6 +107,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps)
     case CHIP_RV380:
         caps->high_second_pipe = TRUE;
         caps->num_vert_fpus = 2;
+        caps->has_cmask = TRUE; /* guessed because there is also HiZ */
         caps->hiz_ram = R300_HIZ_LIMIT;
         caps->zmask_ram = RV3xx_ZMASK_SIZE;
         break;
@@ -127,24 +130,28 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps)
     case CHIP_R481:
     case CHIP_RV410:
         caps->num_vert_fpus = 6;
+        caps->has_cmask = TRUE; /* guessed because there is also HiZ */
         caps->hiz_ram = R300_HIZ_LIMIT;
         caps->zmask_ram = PIPE_ZMASK_SIZE;
         break;
 
     case CHIP_R520:
         caps->num_vert_fpus = 8;
+        caps->has_cmask = TRUE;
         caps->hiz_ram = R300_HIZ_LIMIT;
         caps->zmask_ram = PIPE_ZMASK_SIZE;
         break;
 
     case CHIP_RV515:
         caps->num_vert_fpus = 2;
+        caps->has_cmask = TRUE;
         caps->hiz_ram = R300_HIZ_LIMIT;
         caps->zmask_ram = PIPE_ZMASK_SIZE;
         break;
 
     case CHIP_RV530:
         caps->num_vert_fpus = 5;
+        caps->has_cmask = TRUE;
         caps->hiz_ram = RV530_HIZ_LIMIT;
         caps->zmask_ram = PIPE_ZMASK_SIZE;
         break;
@@ -153,6 +160,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps)
     case CHIP_RV560:
     case CHIP_RV570:
         caps->num_vert_fpus = 8;
+        caps->has_cmask = TRUE;
         caps->hiz_ram = RV530_HIZ_LIMIT;
         caps->zmask_ram = PIPE_ZMASK_SIZE;
         break;
diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h
index f8b5d4e..8e9deb6 100644
--- a/src/gallium/drivers/r300/r300_chipset.h
+++ b/src/gallium/drivers/r300/r300_chipset.h
@@ -55,6 +55,8 @@ struct r300_capabilities {
     int hiz_ram;
     /* Some chipsets have zmask ram per pipe some don't. */
     int zmask_ram;
+    /* CMASK is for MSAA colorbuffer compression and fast clear. */
+    boolean has_cmask;
     /* Compression mode for ZMASK. */
     enum r300_zmask_compression z_compress;
     /* Whether or not this is RV350 or newer, including all r400 and r500
diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c
index 5a38897..063bc09 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -444,11 +444,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen,
             if (!drm_2_8_0) {
                 return FALSE;
             }
-            /* Only support R500, because I didn't test older chipsets,
-             * but MSAA should work there too. */
-            if (!is_r500 && !debug_get_bool_option("RADEON_MSAA", FALSE)) {
-                return FALSE;
-            }
             /* No texturing and scanout. */
             if (usage & (PIPE_BIND_SAMPLER_VIEW |
                          PIPE_BIND_DISPLAY_TARGET |
diff --git a/src/gallium/drivers/r300/r300_texture_desc.c b/src/gallium/drivers/r300/r300_texture_desc.c
index 8d96b56..8fa98c5 100644
--- a/src/gallium/drivers/r300/r300_texture_desc.c
+++ b/src/gallium/drivers/r300/r300_texture_desc.c
@@ -417,6 +417,10 @@ static void r300_setup_cmask_properties(struct r300_screen *screen,
     static unsigned cmask_align_y[4] = {16, 16, 16, 32};
     unsigned pipes, stride, cmask_num_dw, cmask_max_size;
 
+    if (!screen->caps.has_cmask) {
+        return;
+    }
+
     /* We need an AA colorbuffer, no mipmaps. */
     if (tex->b.b.nr_samples <= 1 ||
         tex->b.b.last_level > 0 ||