Mesa (master): radeonsi: update surface sync packet emit for CIK

[Alex Deucher]

Module: Mesa
Branch: master
Commit: 72c10be3a76e0e63a6e33da148fd755a1e3f34c1
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=72c10be3a76e0e63a6e33da148fd755a1e3f34c1

Author: Alex Deucher <alexander.deucher at amd.com>
Date:   Mon Oct  1 16:37:54 2012 -0400

radeonsi: update surface sync packet emit for CIK

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

---

 src/gallium/drivers/radeonsi/si_commands.c |   23 +++++++++++++++++------
 1 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_commands.c b/src/gallium/drivers/radeonsi/si_commands.c
index 8dcf5d3..bf95924 100644
--- a/src/gallium/drivers/radeonsi/si_commands.c
+++ b/src/gallium/drivers/radeonsi/si_commands.c
@@ -60,10 +60,21 @@ void si_cmd_draw_index_auto(struct si_pm4_state *pm4, uint32_t count,
 
 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl)
 {
-	si_pm4_cmd_begin(pm4, PKT3_SURFACE_SYNC);
-	si_pm4_cmd_add(pm4, cp_coher_cntl);	/* CP_COHER_CNTL */
-	si_pm4_cmd_add(pm4, 0xffffffff);	/* CP_COHER_SIZE */
-	si_pm4_cmd_add(pm4, 0);			/* CP_COHER_BASE */
-	si_pm4_cmd_add(pm4, 0x0000000A);	/* POLL_INTERVAL */
-	si_pm4_cmd_end(pm4, false);
+	if (pm4->chip_class >= CIK) {
+		si_pm4_cmd_begin(pm4, PKT3_ACQUIRE_MEM);
+		si_pm4_cmd_add(pm4, cp_coher_cntl);	/* CP_COHER_CNTL */
+		si_pm4_cmd_add(pm4, 0xffffffff);	/* CP_COHER_SIZE */
+		si_pm4_cmd_add(pm4, 0xff);		/* CP_COHER_SIZE_HI */
+		si_pm4_cmd_add(pm4, 0);			/* CP_COHER_BASE */
+		si_pm4_cmd_add(pm4, 0);			/* CP_COHER_BASE_HI */
+		si_pm4_cmd_add(pm4, 0x0000000A);	/* POLL_INTERVAL */
+		si_pm4_cmd_end(pm4, false);
+	} else {
+		si_pm4_cmd_begin(pm4, PKT3_SURFACE_SYNC);
+		si_pm4_cmd_add(pm4, cp_coher_cntl);	/* CP_COHER_CNTL */
+		si_pm4_cmd_add(pm4, 0xffffffff);	/* CP_COHER_SIZE */
+		si_pm4_cmd_add(pm4, 0);			/* CP_COHER_BASE */
+		si_pm4_cmd_add(pm4, 0x0000000A);	/* POLL_INTERVAL */
+		si_pm4_cmd_end(pm4, false);
+	}
 }