Mesa (master): tgsi/ureg: make the dst register match the src indirection

[Zack Rusin]

Module: Mesa
Branch: master
Commit: 8490d21cbe9cce4ceb5c1908b42672f5160fd013
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8490d21cbe9cce4ceb5c1908b42672f5160fd013

Author: Zack Rusin <zackr at vmware.com>
Date:   Thu May  2 03:47:07 2013 -0400

tgsi/ureg: make the dst register match the src indirection

In ureg src registers could have an indirect register that was
either a temp or an addr register, while dst registers allowed
only addr. That made moving between them a little difficult so
make them behave the same way and allow temp's and addr registers
as indirect files for both (tgsi supports it, just ureg didn't).

Signed-off-by: Zack Rusin <zackr at vmware.com>
Reviewed-by: José Fonseca <jfonseca at vmware.com>

---

 src/gallium/auxiliary/tgsi/tgsi_ureg.c |    3 ++-
 src/gallium/auxiliary/tgsi/tgsi_ureg.h |   12 +++++++++---
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index 5a28b89..432ed00 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -258,6 +258,7 @@ ureg_dst_register( unsigned file,
    dst.File      = file;
    dst.WriteMask = TGSI_WRITEMASK_XYZW;
    dst.Indirect  = 0;
+   dst.IndirectFile = TGSI_FILE_NULL;
    dst.IndirectIndex = 0;
    dst.IndirectSwizzle = 0;
    dst.Saturate  = 0;
@@ -943,7 +944,7 @@ ureg_emit_dst( struct ureg_program *ureg,
    
    if (dst.Indirect) {
       out[n].value = 0;
-      out[n].ind.File = TGSI_FILE_ADDRESS;
+      out[n].ind.File = dst.IndirectFile;
       out[n].ind.Swizzle = dst.IndirectSwizzle;
       out[n].ind.Index = dst.IndirectIndex;
       out[n].ind.ArrayID = dst.ArrayID;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.h b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
index 4ad0242..e104cd9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
@@ -84,6 +84,7 @@ struct ureg_dst
    unsigned PredSwizzleW    : 2;  /* TGSI_SWIZZLE_ */
    int      Index           : 16; /* SINT */
    int      IndirectIndex   : 16; /* SINT */
+   unsigned IndirectFile    : 4;  /* TGSI_FILE_ */
    int      IndirectSwizzle : 2;  /* TGSI_SWIZZLE_ */
    unsigned ArrayID         : 10; /* UINT */
 };
@@ -1065,8 +1066,9 @@ static INLINE struct ureg_dst
 ureg_dst_indirect( struct ureg_dst reg, struct ureg_src addr )
 {
    assert(reg.File != TGSI_FILE_NULL);
-   assert(addr.File == TGSI_FILE_ADDRESS);
+   assert(addr.File == TGSI_FILE_ADDRESS || addr.File == TGSI_FILE_TEMPORARY);
    reg.Indirect = 1;
+   reg.IndirectFile = addr.File;
    reg.IndirectIndex = addr.Index;
    reg.IndirectSwizzle = addr.SwizzleX;
    return reg;
@@ -1122,10 +1124,13 @@ ureg_dst( struct ureg_src src )
 {
    struct ureg_dst dst;
 
-   assert(!src.Indirect || src.IndirectFile == TGSI_FILE_ADDRESS);
+   assert(!src.Indirect ||
+          (src.IndirectFile == TGSI_FILE_ADDRESS ||
+           src.IndirectFile == TGSI_FILE_TEMPORARY));
 
    dst.File      = src.File;
    dst.WriteMask = TGSI_WRITEMASK_XYZW;
+   dst.IndirectFile = src.IndirectFile;
    dst.Indirect  = src.Indirect;
    dst.IndirectIndex = src.IndirectIndex;
    dst.IndirectSwizzle = src.IndirectSwizzle;
@@ -1182,7 +1187,7 @@ ureg_src( struct ureg_dst dst )
    src.SwizzleZ  = TGSI_SWIZZLE_Z;
    src.SwizzleW  = TGSI_SWIZZLE_W;
    src.Indirect  = dst.Indirect;
-   src.IndirectFile = TGSI_FILE_ADDRESS;
+   src.IndirectFile = dst.IndirectFile;
    src.IndirectIndex = dst.IndirectIndex;
    src.IndirectSwizzle = dst.IndirectSwizzle;
    src.Absolute  = 0;
@@ -1209,6 +1214,7 @@ ureg_dst_undef( void )
    dst.File      = TGSI_FILE_NULL;
    dst.WriteMask = 0;
    dst.Indirect  = 0;
+   dst.IndirectFile = TGSI_FILE_NULL;
    dst.IndirectIndex = 0;
    dst.IndirectSwizzle = 0;
    dst.Saturate  = 0;