Mesa (master): Revert "r600g: only flush the caches that need to be flushed during CP DMA operations"
Marek Olšák
mareko at kemper.freedesktop.org
Sun Oct 6 01:15:32 UTC 2013
Module: Mesa
Branch: master
Commit: 373f8670d1c670003674e1eaa7c1f0cd823a0431
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=373f8670d1c670003674e1eaa7c1f0cd823a0431
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Oct 5 18:34:32 2013 +0200
Revert "r600g: only flush the caches that need to be flushed during CP DMA operations"
This reverts commit 7948ed1250cae78ae1b22dbce4ab23aceacc6159.
It caused graphical corruption. I've got no idea why.
Bugzilla:
https://bugs.freedesktop.org/show_bug.cgi?id=70042
https://bugs.freedesktop.org/show_bug.cgi?id=68451
Conflicts:
src/gallium/drivers/r600/evergreen_hw_context.c
src/gallium/drivers/r600/r600_hw_context.c
src/gallium/drivers/r600/r600_pipe.h
---
src/gallium/drivers/r600/evergreen_hw_context.c | 19 +++-
src/gallium/drivers/r600/r600_blit.c | 12 --
src/gallium/drivers/r600/r600_hw_context.c | 134 +++--------------------
src/gallium/drivers/r600/r600_pipe.h | 2 -
4 files changed, 28 insertions(+), 139 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c
index 2cefeca..c4fcaa0 100644
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -91,8 +91,16 @@ void evergreen_cp_dma_clear_buffer(struct r600_context *rctx,
offset += r600_resource_va(&rctx->screen->b.b, dst);
/* Flush the cache where the resource is bound. */
- r600_flag_resource_cache_flush(rctx, dst);
- rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE;
+ rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
+ R600_CONTEXT_INV_VERTEX_CACHE |
+ R600_CONTEXT_INV_TEX_CACHE |
+ R600_CONTEXT_FLUSH_AND_INV |
+ R600_CONTEXT_FLUSH_AND_INV_CB |
+ R600_CONTEXT_FLUSH_AND_INV_DB |
+ R600_CONTEXT_FLUSH_AND_INV_CB_META |
+ R600_CONTEXT_FLUSH_AND_INV_DB_META |
+ R600_CONTEXT_STREAMOUT_FLUSH |
+ R600_CONTEXT_WAIT_3D_IDLE;
while (size) {
unsigned sync = 0;
@@ -129,9 +137,10 @@ void evergreen_cp_dma_clear_buffer(struct r600_context *rctx,
offset += byte_count;
}
- /* Flush the cache again in case the 3D engine has been prefetching
- * the resource. */
- r600_flag_resource_cache_flush(rctx, dst);
+ /* Invalidate the read caches. */
+ rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
+ R600_CONTEXT_INV_VERTEX_CACHE |
+ R600_CONTEXT_INV_TEX_CACHE;
util_range_add(&r600_resource(dst)->valid_buffer_range, offset,
offset + size);
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index 5000eae..124efa5 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -611,16 +611,9 @@ void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsig
/* Require 4-byte alignment. */
dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
- /* Flush both resources. */
- r600_flag_resource_cache_flush(rctx, src);
- r600_flag_resource_cache_flush(rctx, dst);
-
r600_blitter_begin(ctx, R600_COPY_BUFFER);
util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width);
r600_blitter_end(ctx);
-
- /* Flush the dst in case the 3D engine has been prefetching the resource. */
- r600_flag_resource_cache_flush(rctx, dst);
} else {
util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
}
@@ -639,15 +632,10 @@ static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *ds
union pipe_color_union clear_value;
clear_value.ui[0] = value;
- r600_flag_resource_cache_flush(rctx, dst);
-
r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND);
util_blitter_clear_buffer(rctx->blitter, dst, offset, size,
1, &clear_value);
r600_blitter_end(ctx);
-
- /* Flush again in case the 3D engine has been prefetching the resource. */
- r600_flag_resource_cache_flush(rctx, dst);
} else {
uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
PIPE_TRANSFER_WRITE);
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index d8ae30c..b127c7d 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -480,9 +480,16 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
src_offset += r600_resource_va(&rctx->screen->b.b, src);
/* Flush the caches where the resources are bound. */
- r600_flag_resource_cache_flush(rctx, src);
- r600_flag_resource_cache_flush(rctx, dst);
- rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE;
+ rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
+ R600_CONTEXT_INV_VERTEX_CACHE |
+ R600_CONTEXT_INV_TEX_CACHE |
+ R600_CONTEXT_FLUSH_AND_INV |
+ R600_CONTEXT_FLUSH_AND_INV_CB |
+ R600_CONTEXT_FLUSH_AND_INV_DB |
+ R600_CONTEXT_FLUSH_AND_INV_CB_META |
+ R600_CONTEXT_FLUSH_AND_INV_DB_META |
+ R600_CONTEXT_STREAMOUT_FLUSH |
+ R600_CONTEXT_WAIT_3D_IDLE;
/* There are differences between R700 and EG in CP DMA,
* but we only use the common bits here. */
@@ -524,9 +531,10 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
dst_offset += byte_count;
}
- /* Flush the cache of the dst resource again in case the 3D engine
- * has been prefetching it. */
- r600_flag_resource_cache_flush(rctx, dst);
+ /* Invalidate the read caches. */
+ rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
+ R600_CONTEXT_INV_VERTEX_CACHE |
+ R600_CONTEXT_INV_TEX_CACHE;
util_range_add(&r600_resource(dst)->valid_buffer_range, dst_offset,
dst_offset + size);
@@ -580,117 +588,3 @@ void r600_dma_copy(struct r600_context *rctx,
util_range_add(&rdst->valid_buffer_range, dst_offset,
dst_offset + size);
}
-
-/* Flag the cache of the resource for it to be flushed later if the resource
- * is bound. Otherwise do nothing. Used for synchronization between engines.
- */
-void r600_flag_resource_cache_flush(struct r600_context *rctx,
- struct pipe_resource *res)
-{
- /* Check vertex buffers. */
- uint32_t mask = rctx->vertex_buffer_state.enabled_mask;
- while (mask) {
- uint32_t i = u_bit_scan(&mask);
- if (rctx->vertex_buffer_state.vb[i].buffer == res) {
- rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE;
- }
- }
-
- /* Check vertex buffers for compute. */
- mask = rctx->cs_vertex_buffer_state.enabled_mask;
- while (mask) {
- uint32_t i = u_bit_scan(&mask);
- if (rctx->cs_vertex_buffer_state.vb[i].buffer == res) {
- rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE;
- }
- }
-
- /* Check constant buffers. */
- unsigned shader;
- for (shader = 0; shader < PIPE_SHADER_TYPES; shader++) {
- struct r600_constbuf_state *state = &rctx->constbuf_state[shader];
- uint32_t mask = state->enabled_mask;
-
- while (mask) {
- unsigned i = u_bit_scan(&mask);
- if (state->cb[i].buffer == res) {
- rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE;
-
- shader = PIPE_SHADER_TYPES; /* break the outer loop */
- break;
- }
- }
- }
-
- /* Check textures. */
- for (shader = 0; shader < PIPE_SHADER_TYPES; shader++) {
- struct r600_samplerview_state *state = &rctx->samplers[shader].views;
- uint32_t mask = state->enabled_mask;
-
- while (mask) {
- uint32_t i = u_bit_scan(&mask);
- if (&state->views[i]->tex_resource->b.b == res) {
- rctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE;
-
- shader = PIPE_SHADER_TYPES; /* break the outer loop */
- break;
- }
- }
- }
-
- /* Check streamout buffers. */
- int i;
- for (i = 0; i < rctx->b.streamout.num_targets; i++) {
- if (rctx->b.streamout.targets[i]->b.buffer == res) {
- rctx->b.flags |= R600_CONTEXT_STREAMOUT_FLUSH |
- R600_CONTEXT_FLUSH_AND_INV |
- R600_CONTEXT_WAIT_3D_IDLE;
- break;
- }
- }
-
- /* Check colorbuffers. */
- for (i = 0; i < rctx->framebuffer.state.nr_cbufs; i++) {
- struct r600_texture *tex;
-
- if (rctx->framebuffer.state.cbufs[i] == NULL) {
- continue;
- }
-
- tex = (struct r600_texture*)rctx->framebuffer.state.cbufs[i]->texture;
-
- if (rctx->framebuffer.state.cbufs[i]->texture == res) {
- rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_CB |
- R600_CONTEXT_FLUSH_AND_INV |
- R600_CONTEXT_WAIT_3D_IDLE;
-
- if (tex->cmask.size || tex->fmask.size) {
- rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_CB_META;
- }
- break;
- }
-
- if (tex && tex->cmask_buffer && tex->cmask_buffer != &tex->resource && &tex->cmask_buffer->b.b == res) {
- rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_CB_META |
- R600_CONTEXT_FLUSH_AND_INV |
- R600_CONTEXT_WAIT_3D_IDLE;
- }
- }
-
- /* Check a depth buffer. */
- if (rctx->framebuffer.state.zsbuf) {
- if (rctx->framebuffer.state.zsbuf->texture == res) {
- rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB |
- R600_CONTEXT_FLUSH_AND_INV |
- R600_CONTEXT_WAIT_3D_IDLE;
- }
-
- struct r600_texture *tex =
- (struct r600_texture*)rctx->framebuffer.state.zsbuf->texture;
- if (tex && tex->htile && &tex->htile->b.b == res) {
- rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB_META |
- R600_CONTEXT_FLUSH_AND_INV |
- R600_CONTEXT_WAIT_3D_IDLE;
- }
- }
-}
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 43fe080..0304d6a 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -685,8 +685,6 @@ void r600_dma_copy(struct r600_context *rctx,
uint64_t dst_offset,
uint64_t src_offset,
uint64_t size);
-void r600_flag_resource_cache_flush(struct r600_context *rctx,
- struct pipe_resource *res);
/*
* evergreen_hw_context.c
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