Mesa (master): i965: Allow immediates to be folded into logical and shift instructions.

[Matt Turner]

Module: Mesa
Branch: master
Commit: 89f5f675ad27bd485d1c1be654ca10c49321957f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=89f5f675ad27bd485d1c1be654ca10c49321957f

Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Aug  5 15:17:04 2013 -0700

i965: Allow immediates to be folded into logical and shift instructions.

These instructions will be used with immediate arguments in the upcoming
ldexp lowering pass and frexp implementation.

v2: Add vec4 support as well.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>

---

 .../drivers/dri/i965/brw_fs_copy_propagation.cpp   |   11 +++++++++++
 .../drivers/dri/i965/brw_vec4_copy_propagation.cpp |   11 +++++++++++
 2 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index 2780ab6..034ebef 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -341,9 +341,20 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
          progress = true;
          break;
 
+      case BRW_OPCODE_SHL:
+      case BRW_OPCODE_SHR:
+         if (i == 1) {
+            inst->src[i] = entry->src;
+            progress = true;
+         }
+         break;
+
       case BRW_OPCODE_MACH:
       case BRW_OPCODE_MUL:
       case BRW_OPCODE_ADD:
+      case BRW_OPCODE_OR:
+      case BRW_OPCODE_AND:
+      case BRW_OPCODE_XOR:
          if (i == 1) {
             inst->src[i] = entry->src;
             progress = true;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index fdbe96c..cd2b118 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -95,9 +95,20 @@ try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4])
       inst->src[arg] = value;
       return true;
 
+   case BRW_OPCODE_SHL:
+   case BRW_OPCODE_SHR:
+      if (arg == 1) {
+         inst->src[arg] = value;
+         return true;
+      }
+      break;
+
    case BRW_OPCODE_MACH:
    case BRW_OPCODE_MUL:
    case BRW_OPCODE_ADD:
+   case BRW_OPCODE_OR:
+   case BRW_OPCODE_AND:
+   case BRW_OPCODE_XOR:
       if (arg == 1) {
 	 inst->src[arg] = value;
 	 return true;