Mesa (master): r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffers

[Michel Dänzer]

Module: Mesa
Branch: master
Commit: 150ac07b855b5c5f879bf6ce9ca421ccd1a6c938
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=150ac07b855b5c5f879bf6ce9ca421ccd1a6c938

Author: Michel Dänzer <michel.daenzer at amd.com>
Date:   Wed Jun 25 18:36:43 2014 +0900

r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffers

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/drivers/radeon/r600_buffer_common.c |   15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index 154c33d..d747cbc 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -110,14 +110,21 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
 	enum radeon_bo_flag flags = 0;
 
 	switch (res->b.b.usage) {
-	case PIPE_USAGE_DYNAMIC:
-	case PIPE_USAGE_STREAM:
-		flags = RADEON_FLAG_GTT_WC;
-		/* fall through */
 	case PIPE_USAGE_STAGING:
 		/* Transfers are likely to occur more often with these resources. */
 		res->domains = RADEON_DOMAIN_GTT;
 		break;
+	case PIPE_USAGE_STREAM:
+	case PIPE_USAGE_DYNAMIC:
+		/* Older kernels didn't always flush the HDP cache before
+		 * CS execution
+		 */
+		if (rscreen->info.drm_minor < 40) {
+			res->domains = RADEON_DOMAIN_GTT;
+			flags = RADEON_FLAG_GTT_WC;
+			break;
+		}
+		/* fall through */
 	case PIPE_USAGE_DEFAULT:
 	case PIPE_USAGE_IMMUTABLE:
 	default: