Mesa (master): i965/vec4: Refactor generate_tex in prep for non-const samplers

Chris Forbes chrisf at kemper.freedesktop.org
Fri Aug 15 07:21:06 UTC 2014


Module: Mesa
Branch: master
Commit: f7146d1a946003bfbb6bc9fc6462a4c827cd93ba
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7146d1a946003bfbb6bc9fc6462a4c827cd93ba

Author: Chris Forbes <chrisf at ijw.co.nz>
Date:   Sun Aug 10 11:50:16 2014 +1200

i965/vec4: Refactor generate_tex in prep for non-const samplers

Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp |   47 ++++++++++++----------
 1 file changed, 25 insertions(+), 22 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 01c543a..2bf72c1 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -314,11 +314,8 @@ vec4_generator::generate_tex(vec4_instruction *inst,
 
    assert(msg_type != -1);
 
-   assert(sampler_index.file == BRW_IMMEDIATE_VALUE);
    assert(sampler_index.type == BRW_REGISTER_TYPE_UD);
 
-   uint32_t sampler = sampler_index.dw1.ud;
-
    /* Load the message header if present.  If there's a texture offset, we need
     * to set it up explicitly and load the offset bitfield.  Otherwise, we can
     * use an implied move from g0 to the first message register.
@@ -363,25 +360,31 @@ vec4_generator::generate_tex(vec4_instruction *inst,
       break;
    }
 
-   uint32_t surface_index = ((inst->opcode == SHADER_OPCODE_TG4 ||
-      inst->opcode == SHADER_OPCODE_TG4_OFFSET)
-      ? prog_data->base.binding_table.gather_texture_start
-      : prog_data->base.binding_table.texture_start) + sampler;
-
-   brw_SAMPLE(p,
-	      dst,
-	      inst->base_mrf,
-	      src,
-              surface_index,
-	      sampler % 16,
-	      msg_type,
-	      1, /* response length */
-	      inst->mlen,
-	      inst->header_present,
-	      BRW_SAMPLER_SIMD_MODE_SIMD4X2,
-	      return_format);
-
-   brw_mark_surface_used(&prog_data->base, surface_index);
+   uint32_t base_binding_table_index = (inst->opcode == SHADER_OPCODE_TG4 ||
+         inst->opcode == SHADER_OPCODE_TG4_OFFSET)
+         ? prog_data->base.binding_table.gather_texture_start
+         : prog_data->base.binding_table.texture_start;
+
+   if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
+      uint32_t sampler = sampler_index.dw1.ud;
+
+      brw_SAMPLE(p,
+                 dst,
+                 inst->base_mrf,
+                 src,
+                 sampler + base_binding_table_index,
+                 sampler % 16,
+                 msg_type,
+                 1, /* response length */
+                 inst->mlen,
+                 inst->header_present,
+                 BRW_SAMPLER_SIMD_MODE_SIMD4X2,
+                 return_format);
+
+      brw_mark_surface_used(&prog_data->base, sampler + base_binding_table_index);
+   } else {
+      /* XXX: Non-constant sampler index. */
+   }
 }
 
 void




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