Mesa (master): i965/gen6 depth surface: calculate depth (array size) for depth surface

Jordan Justen jljusten at kemper.freedesktop.org
Sat Aug 16 04:55:59 UTC 2014


Module: Mesa
Branch: master
Commit: 51b38106d74b1bd4fa2ce552f489c374bdffa812
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=51b38106d74b1bd4fa2ce552f489c374bdffa812

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Tue Jul  9 15:16:35 2013 -0700

i965/gen6 depth surface: calculate depth (array size) for depth surface

(bc1acaa for gen6)

This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.

Note: Cube maps are treated as 2D arrays with 6 times as
many array elements as the cube map array would have.

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/gen6_blorp.cpp     |    2 ++
 src/mesa/drivers/dri/i965/gen6_depth_state.c |    3 +++
 2 files changed, 5 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index f75624c..0b1d097 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -781,6 +781,7 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
    uint32_t draw_y = params->depth.y_offset;
    uint32_t tile_mask_x, tile_mask_y;
    uint32_t surftype;
+   unsigned int depth = MAX2(params->depth.mt->logical_depth0, 1);
    GLenum gl_target = params->depth.mt->target;
 
    switch (gl_target) {
@@ -792,6 +793,7 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
        * equivalent.
        */
       surftype = BRW_SURFACE_2D;
+      depth *= 6;
       break;
    default:
       surftype = translate_tex_target(gl_target);
diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c b/src/mesa/drivers/dri/i965/gen6_depth_state.c
index 90b718c..8ee969f 100644
--- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
@@ -47,6 +47,7 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
    struct gl_context *ctx = &brw->ctx;
    struct gl_framebuffer *fb = ctx->DrawBuffer;
    uint32_t surftype;
+   unsigned int depth = 1;
    GLenum gl_target = GL_TEXTURE_2D;
    const struct intel_renderbuffer *irb = NULL;
    const struct gl_renderbuffer *rb = NULL;
@@ -75,6 +76,7 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
    rb = (struct gl_renderbuffer*) irb;
 
    if (rb) {
+      depth = MAX2(rb->Depth, 1);
       if (rb->TexImage)
          gl_target = rb->TexImage->TexObject->Target;
    }
@@ -88,6 +90,7 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
        * equivalent.
        */
       surftype = BRW_SURFACE_2D;
+      depth *= 6;
       break;
    default:
       surftype = translate_tex_target(gl_target);




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