Mesa (master): radeon/uvd: fix field handling on R6XX style UVD
Christian König
deathsimple at kemper.freedesktop.org
Tue Aug 26 15:57:20 UTC 2014
Module: Mesa
Branch: master
Commit: 80771e47b6c1e47ab55f17311e1d4e227a9eb3d8
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80771e47b6c1e47ab55f17311e1d4e227a9eb3d8
Author: Christian König <christian.koenig at amd.com>
Date: Sun Aug 24 12:22:08 2014 +0200
radeon/uvd: fix field handling on R6XX style UVD
The first UVD generation can only do frame based output.
Signed-off-by: Christian König <christian.koenig at amd.com>
---
src/gallium/drivers/radeon/radeon_video.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_video.c b/src/gallium/drivers/radeon/radeon_video.c
index 17e9a59..6dcee45 100644
--- a/src/gallium/drivers/radeon/radeon_video.c
+++ b/src/gallium/drivers/radeon/radeon_video.c
@@ -251,8 +251,11 @@ int rvid_get_video_param(struct pipe_screen *screen,
profile != PIPE_VIDEO_PROFILE_VC1_MAIN;
case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
- /* and MPEG2 only with shaders */
- return codec != PIPE_VIDEO_FORMAT_MPEG12;
+ /* MPEG2 only with shaders and no support for
+ interlacing on R6xx style UVD */
+ return codec != PIPE_VIDEO_FORMAT_MPEG12 &&
+ /* TODO: RV770 might actually work */
+ rscreen->family > CHIP_RV770;
default:
break;
}
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