Mesa (10.3): freedreno/a3xx: only enable blend clamp for non-float formats

[Emil Velikov]

Module: Mesa
Branch: 10.3
Commit: fd1610d542d5eaa36f93aaa866332f819d16dc39
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd1610d542d5eaa36f93aaa866332f819d16dc39

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Fri Nov 28 16:59:21 2014 -0500

freedreno/a3xx: only enable blend clamp for non-float formats

This fixes arb_color_buffer_float-render GL_RGBA16F.

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.3 10.4" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 3de9fa8ff47bd6b186f9d57511cb9fe08618f62f)

---

 src/gallium/drivers/freedreno/a3xx/fd3_blend.c |    3 +--
 src/gallium/drivers/freedreno/a3xx/fd3_emit.c  |    8 ++++++--
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
index f97b1a7..940d065 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
@@ -105,8 +105,7 @@ fd3_blend_state_create(struct pipe_context *pctx,
 				A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)) |
 				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
 				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
-				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor)) |
-				A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE;
+				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));
 
 		so->rb_mrt[i].control =
 				A3XX_RB_MRT_CONTROL_ROP_CODE(rop) |
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index e22a5ba..62ffa73 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -566,16 +566,20 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
 		}
 	}
 
-	if ((dirty & FD_DIRTY_BLEND) && ctx->blend) {
+	if ((dirty & (FD_DIRTY_BLEND | FD_DIRTY_FRAMEBUFFER)) && ctx->blend) {
 		struct fd3_blend_stateobj *blend = fd3_blend_stateobj(ctx->blend);
 		uint32_t i;
 
 		for (i = 0; i < ARRAY_SIZE(blend->rb_mrt); i++) {
+			bool is_float = util_format_is_float(
+					pipe_surface_format(ctx->framebuffer.cbufs[i]));
+
 			OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
 			OUT_RING(ring, blend->rb_mrt[i].control);
 
 			OUT_PKT0(ring, REG_A3XX_RB_MRT_BLEND_CONTROL(i), 1);
-			OUT_RING(ring, blend->rb_mrt[i].blend_control);
+			OUT_RING(ring, blend->rb_mrt[i].blend_control |
+					COND(!is_float, A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE));
 		}
 	}