Mesa (master): vc4: Add support for 32-bit signed norm/ scaled vertex attrs.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 1b486b52aca79d388bd453b6966a6ecf9e80bc0b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b486b52aca79d388bd453b6966a6ecf9e80bc0b

Author: Eric Anholt <eric at anholt.net>
Date:   Mon Dec 15 12:37:42 2014 -0800

vc4: Add support for 32-bit signed norm/scaled vertex attrs.

32-bit unsigned would require some adjustments to handle values >=
0x80000000.

---

 src/gallium/drivers/vc4/vc4_program.c |   10 ++++++++++
 src/gallium/drivers/vc4/vc4_screen.c  |    8 ++++++++
 2 files changed, 18 insertions(+)

diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index e37303f..4b547c5 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1001,6 +1001,16 @@ get_channel_from_vpm(struct vc4_compile *c,
         else if (chan->size == 32 &&
                  chan->type == UTIL_FORMAT_TYPE_FLOAT) {
                 return get_swizzled_channel(c, vpm_reads, swiz);
+        } else if (chan->size == 32 &&
+                   chan->type == UTIL_FORMAT_TYPE_SIGNED) {
+                if (chan->normalized) {
+                        return qir_FMUL(c,
+                                        qir_ITOF(c, vpm_reads[swiz]),
+                                        qir_uniform_f(c,
+                                                      1.0 / 0x7fffffff));
+                } else {
+                        return qir_ITOF(c, vpm_reads[swiz]);
+                }
         } else if (chan->size == 8 &&
                    (chan->type == UTIL_FORMAT_TYPE_UNSIGNED ||
                     chan->type == UTIL_FORMAT_TYPE_SIGNED)) {
diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c
index 62912d8..3d5370b 100644
--- a/src/gallium/drivers/vc4/vc4_screen.c
+++ b/src/gallium/drivers/vc4/vc4_screen.c
@@ -346,6 +346,14 @@ vc4_screen_is_format_supported(struct pipe_screen *pscreen,
                 case PIPE_FORMAT_R32G32B32_FLOAT:
                 case PIPE_FORMAT_R32G32_FLOAT:
                 case PIPE_FORMAT_R32_FLOAT:
+                case PIPE_FORMAT_R32G32B32A32_SNORM:
+                case PIPE_FORMAT_R32G32B32_SNORM:
+                case PIPE_FORMAT_R32G32_SNORM:
+                case PIPE_FORMAT_R32_SNORM:
+                case PIPE_FORMAT_R32G32B32A32_SSCALED:
+                case PIPE_FORMAT_R32G32B32_SSCALED:
+                case PIPE_FORMAT_R32G32_SSCALED:
+                case PIPE_FORMAT_R32_SSCALED:
                 case PIPE_FORMAT_R16G16B16A16_UNORM:
                 case PIPE_FORMAT_R16G16B16_UNORM:
                 case PIPE_FORMAT_R16G16_UNORM: