Mesa (10.2): 22 new commits

[Carl Worth]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6388ad51ffc2d179383b7fa38757036973397422
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Jun 24 16:34:49 2014 -0700

    i965: Enable compressed multisample support (CMS) on Broadwell.
    
    Everything is in place and appears to be working.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    (cherry picked from commit 8cf289c3ef2fcaded5a89f9d7a600f60a5e8356e)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab0ad8f7e9b6203fc9fd074e201a04fa138f3951
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Jun 24 16:33:56 2014 -0700

    i965: Add 2x MSAA support to the MCS allocation function.
    
    2x MSAA also uses 8 bits, just like 4x.  More bits are unused.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    (cherry picked from commit db184d43b0573c00d911ef9e98fbaab26ebd6466)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1c386d5c352c71c5632804c81daffd399c0b237f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat May 10 01:59:10 2014 -0700

    i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.
    
    MCS buffers are never allocated on Broadwell, so this does nothing for
    now, but puts the infrastructure in place for when they do exist.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
    (cherry picked from commit a248b2a4ebb27832d6c8a40ce2b10134f8735b93)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3c0c238736bbfc990bfd275426eb8fd8c259ade
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri May 9 22:22:24 2014 -0700

    i965: Drop SINT workaround for CMS layout on Broadwell.
    
    According to the documentation, we don't need this SINT workaround on
    Broadwell.  (Or at least, it doesn't mention that we need it.)
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
    (cherry picked from commit e10311be9f61230de7f06e9fb30834835ba3677d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a90fbfce4bd50ab85e1a36f3786720d56323b62
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat May 10 01:42:15 2014 -0700

    i965: Add plumbing for Broadwell's auxiliary surface support.
    
    Broadwell generalizes the MCS fields to allow for multiple kinds of
    auxiliary surfaces.  This patch adds the plumbing to set those values,
    but doesn't yet hook any up.
    
    v2: (by Jordan Justen) Use mt for qpitch; pitch is tiles - 1.
    v3: Don't forget to subtract 1 from aux_mt->pitch.
    v4: Drop unnecessary aux_mt->offset (caught by Jordan Justen).
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
    (cherry picked from commit fd7718768929ff7fd1460bafc32f7b8be75a3140)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d374cfe0bca9929d451a47c29fce8445a12d5963
Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Thu Mar 6 09:18:14 2014 -0800

    i965: Add auxiliary surface field #defines for Broadwell.
    
    Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
    (cherry picked from commit a46cb6a971b136f41e24739551f6d36ecc1694c0)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b56908d7db3a691b63e62c41b7ad0a5d4559ee50
Author: Matt Turner <mattst88 at gmail.com>
Date:   Tue May 27 15:26:06 2014 -0700

    i965/fs: Set correct number of regs_written for MCS fetches.
    
    regs_written is in units of virtual GRFs.
    
    Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit dfd117b8570a69a429e660c069997e78b181ab6d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6a6acb6b4412427e3a7e49ec5efc769fe43695b
Author: Eric Anholt <eric at anholt.net>
Date:   Tue May 6 13:22:10 2014 -0700

    i965: Generalize the pixel_x/y workaround for all UW types.
    
    This is the only case where a fs_reg in brw_fs_visitor is used during
    optimization/code generation, and it meant that optimizations had to be
    careful to not move pixel_x/y's register number without updating it.
    
    Additionally, it turns out we had a couple of other UW values that weren't
    getting this treatment (like gl_SampleID), so this more general fix is
    probably a good idea (though I wasn't able to replicate problems with
    either pixel_[xy]'s values or gl_SampleID, even when telling the register
    allocator to reuse registers immediately)
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit 66f5c8df067ed014c98ef7cf21591e9ea0b5b6bb)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=64ff84abaee8d8925a21eea7cd2b833a51b0ba03
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Jul 15 20:40:55 2014 -0700

    i965/fs: Use WE_all for gl_SampleID header register munging.
    
    This code should execute without regard to the currently executing
    channels.  Asking for gl_SampleID inside control flow might break in
    strange ways.  It appears to break even at the top of the program in
    SIMD16 mode occasionally as well.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 6dc9e4e22a19108057162d9d8f8c7d559545f8de)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f4e03c3978c1436d48752ca38e2831fa43e1159
Author: Matt Turner <mattst88 at gmail.com>
Date:   Thu Apr 17 11:53:22 2014 -0700

    i965/fs: Don't use brw_imm_* unnecessarily.
    
    Using brw_imm_* creates a source with file=HW_REG, and the scheduler
    inserts barrier dependencies when it sees HW_REG. None of these are
    hardware-registers in the sense that they're special and scheduling
    shouldn't touch them. A few of the modified cases already have HW_REGs
    for other sources, so it won't allow extra flexibility in some cases.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit c938be8ad272a06bc0e91c4e718b61a0c5de400e)
    (This patch was cherry-picked to make the next commit apply cleanly.)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=258f35441a6a572e681c698b60836aa22b949ea4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Jul 10 17:48:39 2014 -0700

    i965/fs: Set force_uncompressed and force_sechalf on samplepos setup.
    
    gen8_fs_generator uses these to decide whether to set the execution size
    to 8 or 16, so we incorrectly made both of these MOVs the full width in
    SIMD16 shaders.  (It happened to work out on Gen4-7.)
    
    Setting them should also help inform optimization passes what's really
    going on, which could help avoid bugs.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Cc: mesa-stable at lists.freedesktop.org

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb04294b42ff8fac269eae3b76ad0814bd984dfe
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Jul 10 17:49:36 2014 -0700

    i965: Set execution size to 8 for instructions with force_sechalf set.
    
    Both inst->force_uncompressed and inst->force_sechalf mean that the
    generated instruction should be uncompressed and have an execution size
    of 8.  We don't require the visitor to set both flags - setting
    inst->force_sechalf by itself is supposed to be enough.
    
    On Gen4-7, guess_execution_size() demoted instructions to 8-wide based
    on the default compression state.  On Gen8+, we instead set a default
    execution size, which worked great...except that we forgot to check
    inst->force_sechalf when deciding whether to use 8 or 16.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 1c62126612752f6eedb66f705cc3ff1e11beea5d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d389a863f2f4bd424baf264bfb71950b1dfe32f5
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Jun 23 22:07:38 2014 -0700

    i965/vec4: Constant propagate into 2-src math instructions on Gen8.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit 7192207de18a7a7e127a8a5910626af96f001993)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fcfdfb17b187c2370a0c31da32908973d526eb3
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Jun 23 22:07:20 2014 -0700

    i965/fs: Constant propagate into 2-src math instructions on Gen8.
    
    total instructions in shared programs: 1878133 -> 1876986 (-0.06%)
    instructions in affected programs:     153007 -> 151860 (-0.75%)
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit 038eb649b30dfddaf40888ea28b5e88de3af2214)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8612a12a62ce1ed3f8989ca3e969e9992429206e
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Jun 23 22:05:03 2014 -0700

    i965/fs: Make try_constant_propagate() static.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit aca4a951ea2bab855bcc2491a3b8996b54639ebd)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f787d3ca286760c16c4cdec3de7978c8098c3c0
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Jun 23 13:30:15 2014 -0700

    i965/fs: Don't fix_math_operand() on Gen >= 8.
    
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    (cherry picked from commit 48f1143c64e46b3d11dc318d7825b6167a2b78e5)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b323fa8957f3b755f8d8be5ec23f18279da47ef0
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Jun 23 13:30:14 2014 -0700

    i965/vec4: Don't fix_math_operand() on Gen >= 8.
    
    The emit_math?_gen? functions serve to implement workarounds for the
    math instruction, none of which exist on Gen8+.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    (cherry picked from commit b24e1cc6049d997e8f78283dcf6a75e99541faed)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5d94598cb25723f9a4b00220d33122c4188f2ae
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Jun 23 13:30:13 2014 -0700

    i965/vec4: Don't return void from a void function.
    
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    (cherry picked from commit 0e800dfe75d75c2c5c12bb3762aa9723854a241e)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2efd0a3479d856e3ef76ad2873c14f4c4a4180b1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Jul 15 21:27:08 2014 -0700

    i965: Don't copy propagate abs into Broadwell logic instructions.
    
    It's not clear what abs on logical instructions means on Broadwell, and
    it doesn't appear to do anything sensible.
    
    Fixes 270 Piglit tests (the bitand/bitor/bitxor tests with abs).
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81157
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Cc: "10.2" <mesa-stable at lists.freedesktop.org>
    (cherry picked from commit a2de6562783ea87ca5fbcb67dbd36c2f345f2054)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a832e584693b52b47694775c8dfdb33fd97769b
Author: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
Date:   Thu Jun 5 11:05:31 2014 -0700

    i965/vec4: skip copy-propate for logical instructions with negated src entries
    
    The negation source modifier on src registers has changed meaning in Broadwell when
    used with logical operations. Don't copy propagate when negate src modifier is set
    and when the destination instruction is a logical op.
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
    (cherry picked from commit c17db7537fe112841bb76b91865a30d97aae3594)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d55a8979291de845cb881b9c34a380fa2ed82493
Author: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
Date:   Thu Jun 5 11:05:29 2014 -0700

    i965/fs: skip copy-propate for logical instructions with negated src entries
    
    The negation source modifier on src registers has changed meaning in Broadwell when
    used with logical operations. Don't copy propagate when negate src modifier is set
    and when the destination instruction is a logical op.
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
    (cherry picked from commit 609d00e13e1e3e61ce540c42250c35977d4bcaa1)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=276c6bb3696fe741e3b300cb73e7bf74df3af92d
Author: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
Date:   Thu Jun 5 11:05:28 2014 -0700

    i965/fs: Refactor check for potential copy propagated instructions.
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
    (cherry picked from commit a66660d2b75197814f5e36b9994b1e9eadff0a2e)