Mesa (master): nvc0: fix dri3 prime buffer creation

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 13eddf3bf2d9aee3ebca828d009c01d16f6545c6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=13eddf3bf2d9aee3ebca828d009c01d16f6545c6

Author: Dave Airlie <airlied at gmail.com>
Date:   Mon Jun 16 05:39:02 2014 +0000

nvc0: fix dri3 prime buffer creation

We need to place shared buffers into GART.

Reviewed-by: Axel Davy <axel.davy at ens.fr>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Signed-off-by: Dave Airlie <airlied at redhat.com>

---

 src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
index 79c9390..2f3cba8 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
@@ -296,7 +296,7 @@ nvc0_miptree_create(struct pipe_screen *pscreen,
    }
    bo_config.nvc0.tile_mode = mt->level[0].tile_mode;
 
-   if (!bo_config.nvc0.memtype && pt->usage == PIPE_USAGE_STAGING)
+   if (!bo_config.nvc0.memtype && (pt->usage == PIPE_USAGE_STAGING || pt->bind & PIPE_BIND_SHARED))
       mt->base.domain = NOUVEAU_BO_GART;
    else
       mt->base.domain = NOUVEAU_BO_VRAM;