Mesa (master): 23 new commits
Kenneth Graunke
kwg at kemper.freedesktop.org
Mon Jun 30 21:05:34 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c60a4ba7e36f069d6829948ee14d87970f5f39a1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 21:16:06 2014 -0700
i965/disasm: Fix INTEL_DEBUG=fs on Broadwell for ARB_fp applications.
Apparently INTEL_DEBUG=fs has crashed on Broadwell for anything using
ARB_fragment_program since commit 9cee3ff5. We need to NULL-check the
right field.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
Cc: "10.2" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5dfbfd17e06fa8ce21e9c94034e199769ee740e3
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 20:39:24 2014 -0700
i965/disasm: Delete gen8_disasm.c.
The functionality has been merged into brw_disasm.c; use that instead.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e59a9ecc98a9715307ae42f8e267b2f09129d690
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 20:37:56 2014 -0700
i965/disasm: Stop using gen8_disassemble in favor of brw_disassemble.
At this point, brw_disassemble can do everything gen8_disassemble can
do - and, thanks to the new brw_inst API, it supports all generations.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b7f95b95236747233feb8de5781a72e357a8dc4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 20:25:57 2014 -0700
i965/disasm: Improve render target write message disassembly.
Previously, we decoded render target write messages as:
render ( RT write, 0, 16, 12, 0) mlen 8 rlen 0
which made you remember (or look up) what the numbers meant:
1. The binding table index
2. The raw message control, undecoded:
- Last Render Target Select
- Slot Group Select
- Message Type (SIMD8, normal SIMD16, SIMD16 replicate data, ...)
3. The dataport message type, again (already decoded as "RT write")
4. The write commit bit (0 or 1)
Needless to say, having to decipher that yourself is annoying. Now, we
do:
render RT write SIMD16 LastRT Surface = 0 mlen 8 rlen 0
with optional "Hi" and "WriteCommit" for slot group/write commit.
Thanks to the new brw_inst API, we can also stop duplicating code on a
per-generation basis.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e5b52e35da17a4cef77e00fdcf65048ca6c9695
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 19:49:57 2014 -0700
i965/disasm: Rename msg_target to SFID.
We haven't used the name "message target" in a while - there are a lot
of things called "target", and it gets confusing. SFID ("Shared
Function ID") is the term commonly used in the modern documentation.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4cf088f43dc52d61661970324e7850b6c07c55b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 19:41:38 2014 -0700
i965/disasm: Fix typo in RT UNORM write message.
The name of this message is "Render Target UNORM Write" (Sandybridge
PRM, Volume 4 Part 1, Page 210). Drop the bogus 'c'.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3603dfff6fc4d03f2c691eb9019d0ade1d5dfa3b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 19:36:26 2014 -0700
i965/disasm: Use Gen6+ SFID case labels.
Most developers will recognize the Gen6+ SFID names more quickly than
the Gen4-5 ones. Given that they're the same values, just use the new
names.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4fe78f4cc2fac1781a315151add77793adc61669
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 19:29:08 2014 -0700
i965/disasm: "Handle" Gen8+ HF/DF immediate cases.
We should print something properly, but I'm not sure how to properly
print an HF, and we don't have any DFs today to test with.
This is at least better than the current Gen8 disassembler, which would
simply assert fail.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f36bebcd5c9d3f23d611c59a97ab49e93c8850ee
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 19:16:18 2014 -0700
i965/disasm: Cut piles of duplicate swizzle printing.
Making a helper function saves us from cut and pasting this four times.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdcbcc73dd67892247e133309c65eb4677757eb0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 19:08:11 2014 -0700
i965/disasm: Properly decode negate source modifiers on Broadwell.
This is a port of Abdiel's 6f9f916b9b042a294813ab0542390846a38739da
to brw_disasm.c.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=00b72bbab5678e29b61b34cd7f7fec9c25866ce9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 18:55:24 2014 -0700
i965/disasm: Improve disassembly of atomic messages on Haswell+.
This backports the atomic message disassembly support from
gen8_disasm.c, which additionally offers support for decoding atomic
surface read/write messages, and showing SIMD modes and other details.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb3185f6864acf43084a3e083902d943e481f759
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 18:37:02 2014 -0700
i965/disasm: Actually disassemble Gen7+ URB opcodes.
I never bothered implementing the disassembler for Gen7+ URB opcodes, so
we were just disassembling them as Ironlake/Sandybridge ones. This
looked pretty bad when running Paul's GS EndPrimitive tests, as the
"write OWord" message was decoded at ff_sync, which doesn't exist.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa9e23dbe81977032e8e53211b46b6daef347cb8
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 18:33:45 2014 -0700
i965/disasm: Decode Broadwell's invm/rsqrtm math functions.
We don't use these yet, but we may as well disassemble them.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a91f92596908f2934350bc115bd889f2926128a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 18:27:02 2014 -0700
i965/disasm: Properly disassemble the "atomic" ThreadCtrl value.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=156c73a899efd9618cc791447e0b16ac8735c57e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 18:24:05 2014 -0700
i965/disasm: Properly disassemble all32h/any32h align1 predicates.
While we're adding things, use symbolic constants rather than magic
numbers.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=03084453d70a148faa0479e91d37af69d8f0f0e7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 18:20:50 2014 -0700
i965: Add #defines for any32h/all32h predication.
These have existed since Ivybridge. We don't use them today, but the
Gen8+ disassembler supports them, and I'd like to use symbolic names
rather than magic numbers.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=707c42cb9601c64aa8dc7ac8d277b56d0a6b34a4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 17:54:47 2014 -0700
i965/disasm: Mark ELSE as having UIP on Gen8+.
This makes brw_disasm.c able to disassemble ELSE instructions correctly
on Broadwell. (gen8_disasm.c already handles this correctly.)
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=df4eeed0befc39385f3baa40b4f38183b9c76363
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 17:48:42 2014 -0700
i965/disasm: Properly disassemble jump targets on Gen4-5.
Previously, our dissasembly for flow control instructions looked like:
0x00000040: else(8) ip 65540D { align16 switch };
It didn't print InstCount properly for ELSE/ENDIF, and didn't even
attempt to disassemble PopCount.
Now it looks like:
0x00000040: else(8) Jump: 4 Pop: 1 { align16 switch };
which is much more readable.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6928959d8eba05b8a7d62d8829472ddc298bc8d1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 17:26:13 2014 -0700
i965/disasm: Improve disassembly of jump targets on Gen6+.
Previously, flow control instructions generated output like:
(+f0) if(8) 12 8 null 0x000c0008UD { align16 WE_normal 1Q };
which included a dissasembly of the register fields, even though those
are meaningless for flow control instructions---those bits are reused
for another purpose.
It also wasn't immediately obvious which number was UIP and which was
JIP.
With this patch, we instead output:
(+f0) if(8) JIP: 8 UIP: 12 { align16 WE_normal 1Q };
which is much clearer.
The patch also introduces has_uip/has_jip helper functions which clear
up a some generation/opcode checking mess.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6497890bf426699c5a03b22eadc509808f31373f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 15:38:32 2014 -0700
i965/disasm: Add support for new Gen8+ register types.
While we're at it, use proper names rather than magic numbers for the
existing fields.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5f106b03a96360314d231ad06c8b645d316700ee
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 17:08:21 2014 -0700
i965: Restyle brw_disasm.c.
brw_disasm.c basically wasn't following the Mesa coding style at all.
It used 4-space indent instead of 3-space, didn't cuddle braces, didn't
put function return types on a separate line, put extra spaces in
function calls (between the name and parenthesis), and a number of other
things.
This made it fairly obnoxious to work on, since my editor is configured
to follow Mesa style in the Mesa source repository. Fixing it to follow
a consistent style now should save time dealing with it later.
These modifications were originally generated by:
$ indent -br -i3 -npcs -ce -cs -l80 --no-tabs
with some manual changes afterwards to fit our style better.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e20e9a830a4f6a3956e8c1bd21f94fd53b3ceb2
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 17:03:45 2014 -0700
i965/disasm: Create an "opcode" temporary.
This saves typing brw_inst_opcode(brw, inst) everywhere.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d1992754f4234756704a24242a2e8e93e2069bf
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jun 28 17:00:21 2014 -0700
i965/disasm: Eliminate opcode pointer.
opcode is just a pointer to opcode_descs; we may as well use that
directly.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
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