Mesa (master): i965/vec4: Port untyped surface reads support to Broadwell.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 45367d2d092266e60d6f4a5b8f17d5a410cdfee9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=45367d2d092266e60d6f4a5b8f17d5a410cdfee9

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Apr 17 19:22:33 2014 -0700

i965/vec4: Port untyped surface reads support to Broadwell.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77221
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>

---

 src/mesa/drivers/dri/i965/brw_vec4.h              |    3 +++
 src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp |   26 ++++++++++++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 9919a89..3bfe8e4 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -783,6 +783,9 @@ private:
                                     struct brw_reg dst,
                                     struct brw_reg index,
                                     struct brw_reg offset);
+   void generate_untyped_surface_read(vec4_instruction *ir,
+                                      struct brw_reg dst,
+                                      struct brw_reg surf_index);
 
    struct brw_vec4_prog_data *prog_data;
 
diff --git a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
index dd3035c..1c4823d 100644
--- a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
@@ -456,6 +456,30 @@ gen8_vec4_generator::generate_pull_constant_load(vec4_instruction *inst,
 }
 
 void
+gen8_vec4_generator::generate_untyped_surface_read(vec4_instruction *ir,
+                                                   struct brw_reg dst,
+                                                   struct brw_reg surf_index)
+{
+   assert(surf_index.file == BRW_IMMEDIATE_VALUE &&
+          surf_index.type == BRW_REGISTER_TYPE_UD);
+
+   gen8_instruction *inst = next_inst(BRW_OPCODE_SEND);
+   gen8_set_dst(brw, inst, retype(dst, BRW_REGISTER_TYPE_UD));
+   gen8_set_src0(brw, inst, brw_message_reg(ir->base_mrf));
+   gen8_set_dp_message(brw, inst, HSW_SFID_DATAPORT_DATA_CACHE_1,
+                       surf_index.dw1.ud,
+                       HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ,
+                       0xe, /* enable only the R channel */
+                       ir->mlen,
+                       1,
+                       ir->header_present,
+                       false);
+
+   brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+}
+
+
+void
 gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
                                                struct brw_reg dst,
                                                struct brw_reg *src)
@@ -765,7 +789,7 @@ gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
       break;
 
    case SHADER_OPCODE_UNTYPED_SURFACE_READ:
-      assert(!"XXX: Missing Gen8 vec4 support for UNTYPED_SURFACE_READ");
+      generate_untyped_surface_read(ir, dst, src[0]);
       break;
 
    case VS_OPCODE_UNPACK_FLAGS_SIMD4X2: