Mesa (10.1): r600g: fix MSAA resolve on R6xx when the destination is 1D-tiled
Carl Worth
cworth at kemper.freedesktop.org
Thu May 1 14:31:39 UTC 2014
Module: Mesa
Branch: 10.1
Commit: 5e688c060153e69152058ad9c53172b80d43cb17
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e688c060153e69152058ad9c53172b80d43cb17
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Apr 19 23:11:41 2014 +0200
r600g: fix MSAA resolve on R6xx when the destination is 1D-tiled
Cc: 10.0 10.1 mesa-stable at lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
(cherry picked from commit 20a9b784da3c286bdba5fbfb4e6592e16560895c)
---
src/gallium/drivers/radeon/r600_texture.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 8ea1565..f297792 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -296,6 +296,12 @@ void r600_texture_get_fmask_info(struct r600_common_screen *rscreen,
fmask.nsamples = 1;
fmask.flags |= RADEON_SURF_FMASK;
+ /* Force 2D tiling if it wasn't set. This may occur when creating
+ * FMASK for MSAA resolve on R6xx. On R6xx, the single-sample
+ * destination buffer must have an FMASK too. */
+ fmask.flags = RADEON_SURF_CLR(fmask.flags, MODE);
+ fmask.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
+
if (rscreen->chip_class >= SI) {
fmask.flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
}
More information about the mesa-commit
mailing list