Mesa (master): nvc0: maxwell isa has no per-instruction join modifier
Ben Skeggs
darktama at kemper.freedesktop.org
Wed May 14 23:55:04 UTC 2014
Module: Mesa
Branch: master
Commit: 7b9475fa652b9df6d599edbea8fa5049fdd995e1
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b9475fa652b9df6d599edbea8fa5049fdd995e1
Author: Ben Skeggs <bskeggs at redhat.com>
Date: Fri May 9 15:56:03 2014 +1000
nvc0: maxwell isa has no per-instruction join modifier
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 34 +++++++++++---------
.../drivers/nouveau/codegen/nv50_ir_target.h | 3 +-
.../nouveau/codegen/nv50_ir_target_nv50.cpp | 2 +-
.../nouveau/codegen/nv50_ir_target_nvc0.cpp | 3 +-
4 files changed, 23 insertions(+), 19 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index cdae3c8..3005922 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -2067,22 +2067,24 @@ FlatteningPass::visit(BasicBlock *bb)
return true;
// try to attach join to previous instruction
- Instruction *insn = bb->getExit();
- if (insn && insn->op == OP_JOIN && !insn->getPredicate()) {
- insn = insn->prev;
- if (insn && !insn->getPredicate() &&
- !insn->asFlow() &&
- insn->op != OP_TEXBAR &&
- !isTextureOp(insn->op) && // probably just nve4
- !isSurfaceOp(insn->op) && // not confirmed
- insn->op != OP_LINTERP && // probably just nve4
- insn->op != OP_PINTERP && // probably just nve4
- ((insn->op != OP_LOAD && insn->op != OP_STORE) ||
- typeSizeof(insn->dType) <= 4) &&
- !insn->isNop()) {
- insn->join = 1;
- bb->remove(bb->getExit());
- return true;
+ if (prog->getTarget()->hasJoin) {
+ Instruction *insn = bb->getExit();
+ if (insn && insn->op == OP_JOIN && !insn->getPredicate()) {
+ insn = insn->prev;
+ if (insn && !insn->getPredicate() &&
+ !insn->asFlow() &&
+ insn->op != OP_TEXBAR &&
+ !isTextureOp(insn->op) && // probably just nve4
+ !isSurfaceOp(insn->op) && // not confirmed
+ insn->op != OP_LINTERP && // probably just nve4
+ insn->op != OP_PINTERP && // probably just nve4
+ ((insn->op != OP_LOAD && insn->op != OP_STORE) ||
+ typeSizeof(insn->dType) <= 4) &&
+ !insn->isNop()) {
+ insn->join = 1;
+ bb->remove(bb->getExit());
+ return true;
+ }
}
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
index 9eb0a1f..711056e 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
@@ -120,7 +120,7 @@ enum OpClass
class Target
{
public:
- Target(bool j, bool s) : joinAnterior(j), hasSWSched(s) { }
+ Target(bool m, bool j, bool s) : hasJoin(m), joinAnterior(j), hasSWSched(s) { }
virtual ~Target() { }
static Target *create(uint32_t chipset);
@@ -192,6 +192,7 @@ public:
virtual uint32_t getSVAddress(DataFile, const Symbol *) const = 0;
public:
+ const bool hasJoin; // true if instructions have a join modifier
const bool joinAnterior; // true if join is executed before the op
const bool hasSWSched; // true if code should provide scheduling data
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index 32ba5c8..799ac2f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -29,7 +29,7 @@ Target *getTargetNV50(unsigned int chipset)
return new TargetNV50(chipset);
}
-TargetNV50::TargetNV50(unsigned int card) : Target(true, false)
+TargetNV50::TargetNV50(unsigned int card) : Target(true, true, false)
{
chipset = card;
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index adf2df8..064e7a2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -29,7 +29,8 @@ Target *getTargetNVC0(unsigned int chipset)
return new TargetNVC0(chipset);
}
-TargetNVC0::TargetNVC0(unsigned int card) : Target(false, card >= 0xe4)
+TargetNVC0::TargetNVC0(unsigned int card) :
+ Target(card < 0x110, false, card >= 0xe4)
{
chipset = card;
initOpInfo();
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