Mesa (master): radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodes

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 645b471d619b654d3bacfa8598f759833e08db4e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=645b471d619b654d3bacfa8598f759833e08db4e

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Nov 20 22:16:09 2014 +0100

radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodes

So far it has been compiled into pretty ugly code (8 instructions or so
for either opcode).

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

---

 src/gallium/drivers/radeonsi/si_shader.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 40a2f90..037811e 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2737,6 +2737,13 @@ int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
 	bld_base->op_actions[TGSI_OPCODE_EMIT].emit = si_llvm_emit_vertex;
 	bld_base->op_actions[TGSI_OPCODE_ENDPRIM].emit = si_llvm_emit_primitive;
 
+	if (HAVE_LLVM >= 0x0306) {
+		bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
+		bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
+		bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
+		bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
+	}
+
 	si_shader_ctx.radeon_bld.load_system_value = declare_system_value;
 	si_shader_ctx.tokens = sel->tokens;
 	tgsi_parse_init(&si_shader_ctx.parse, si_shader_ctx.tokens);