Mesa (master): vc4: Add support for the TXL opcode.
Eric Anholt
anholt at kemper.freedesktop.org
Mon Oct 13 16:16:54 UTC 2014
Module: Mesa
Branch: master
Commit: e1d1c396265ce3b363e99422b46275275723ee21
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1d1c396265ce3b363e99422b46275275723ee21
Author: Eric Anholt <eric at anholt.net>
Date: Mon Oct 13 14:38:10 2014 +0100
vc4: Add support for the TXL opcode.
There's a bit at the bottom of cube map stride (which has some formatting
bugs in the docs) which flips the bias coordinate to being an absolute
LOD.
---
src/gallium/drivers/vc4/vc4_program.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 1bbdba5..3056c67 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -528,6 +528,7 @@ tgsi_to_qir_tex(struct vc4_compile *c,
struct qreg t = src[0 * 4 + 1];
struct qreg r = src[0 * 4 + 2];
uint32_t unit = tgsi_inst->Src[1].Register.Index;
+ bool is_txl = tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXL;
struct qreg proj = c->undef;
if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXP) {
@@ -561,6 +562,13 @@ tgsi_to_qir_tex(struct vc4_compile *c,
}
if (tgsi_inst->Texture.Texture == TGSI_TEXTURE_CUBE ||
+ tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE ||
+ is_txl) {
+ texture_u[2] = add_uniform(c, QUNIFORM_TEXTURE_CONFIG_P2,
+ unit | (is_txl << 16));
+ }
+
+ if (tgsi_inst->Texture.Texture == TGSI_TEXTURE_CUBE ||
tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE) {
struct qreg ma = qir_FMAXABS(c, qir_FMAXABS(c, s, t), r);
struct qreg rcp_ma = qir_RCP(c, ma);
@@ -568,8 +576,6 @@ tgsi_to_qir_tex(struct vc4_compile *c,
t = qir_FMUL(c, t, rcp_ma);
r = qir_FMUL(c, r, rcp_ma);
- texture_u[2] = add_uniform(c, QUNIFORM_TEXTURE_CONFIG_P2, unit);
-
qir_TEX_R(c, r, texture_u[next_texture_u++]);
} else if (c->key->tex[unit].wrap_s == PIPE_TEX_WRAP_CLAMP_TO_BORDER ||
c->key->tex[unit].wrap_s == PIPE_TEX_WRAP_CLAMP ||
@@ -591,7 +597,8 @@ tgsi_to_qir_tex(struct vc4_compile *c,
qir_TEX_T(c, t, texture_u[next_texture_u++]);
- if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXB)
+ if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXB ||
+ tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXL)
qir_TEX_B(c, src[0 * 4 + 3], texture_u[next_texture_u++]);
qir_TEX_S(c, s, texture_u[next_texture_u++]);
@@ -1175,6 +1182,7 @@ emit_tgsi_instruction(struct vc4_compile *c,
case TGSI_OPCODE_TEX:
case TGSI_OPCODE_TXP:
case TGSI_OPCODE_TXB:
+ case TGSI_OPCODE_TXL:
tgsi_to_qir_tex(c, tgsi_inst,
op_trans[tgsi_op].op, src_regs);
return;
@@ -2163,15 +2171,17 @@ write_texture_p1(struct vc4_context *vc4,
static void
write_texture_p2(struct vc4_context *vc4,
struct vc4_texture_stateobj *texstate,
- uint32_t unit)
+ uint32_t data)
{
+ uint32_t unit = data & 0xffff;
struct pipe_sampler_view *texture = texstate->textures[unit];
struct vc4_resource *rsc = vc4_resource(texture->texture);
cl_u32(&vc4->uniforms,
VC4_SET_FIELD(VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE,
VC4_TEX_P2_PTYPE) |
- VC4_SET_FIELD(rsc->cube_map_stride >> 12, VC4_TEX_P2_CMST));
+ VC4_SET_FIELD(rsc->cube_map_stride >> 12, VC4_TEX_P2_CMST) |
+ VC4_SET_FIELD((data >> 16) & 1, VC4_TEX_P2_BSLOD));
}
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