Mesa (10.6): gm107/ir: indirect handle goes first on maxwell also

[Emil Velikov]

Module: Mesa
Branch: 10.6
Commit: 0a831196665f8a9c2c5001f9c1890e073bac9f14
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a831196665f8a9c2c5001f9c1890e073bac9f14

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Fri Aug 14 14:10:36 2015 -0400

gm107/ir: indirect handle goes first on maxwell also

Fixes fs-simple-texture-size.shader_test

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit b346a84e270a50f0a8f1a6e474a51da04dd72f0e)

---

 .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp      |   12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index e71fa11..3fd19a9 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -987,14 +987,10 @@ NVC0LoweringPass::handleTXQ(TexInstruction *txq)
       txq->tex.r = 0xff;
       txq->tex.s = 0x1f;
 
-      if (chipset < NVISA_GM107_CHIPSET) {
-         txq->setIndirectR(NULL);
-         txq->moveSources(0, 1);
-         txq->setSrc(0, hnd);
-         txq->tex.rIndirectSrc = 0;
-      } else {
-         txq->setIndirectR(hnd);
-      }
+      txq->setIndirectR(NULL);
+      txq->moveSources(0, 1);
+      txq->setSrc(0, hnd);
+      txq->tex.rIndirectSrc = 0;
    }
 
    return true;