Mesa (master): nv50: add PIPELINE_STATISTICS query support, based on nvc0

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 5000a5f67b556096b6ba1e9bdac3a6e5cd5a1f68
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5000a5f67b556096b6ba1e9bdac3a6e5cd5a1f68

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Wed Feb 18 03:35:23 2015 -0500

nv50: add PIPELINE_STATISTICS query support, based on nvc0

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Tested-by: Nick Tenney <nick.tenney at gmail.com>

---

 docs/relnotes/10.6.0.html                      |    2 +-
 src/gallium/drivers/nouveau/nv50/nv50_query.c  |   27 +++++++++++++++++++++++-
 src/gallium/drivers/nouveau/nv50/nv50_screen.c |    2 +-
 3 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/docs/relnotes/10.6.0.html b/docs/relnotes/10.6.0.html
index 151ba17..695f757 100644
--- a/docs/relnotes/10.6.0.html
+++ b/docs/relnotes/10.6.0.html
@@ -47,7 +47,7 @@ Note: some of the new features are only available with certain drivers.
 <li>GL_AMD_pinned_memory on r600, radeonsi</li>
 <li>GL_ARB_draw_instanced on freedreno</li>
 <li>GL_ARB_instanced_arrays on freedreno</li>
-<li>GL_ARB_pipeline_statistics_query on i965, nvc0, r600, radeonsi, softpipe</li>
+<li>GL_ARB_pipeline_statistics_query on i965, nv50, nvc0, r600, radeonsi, softpipe</li>
 </ul>
 
 <h2>Bug fixes</h2>
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query.c b/src/gallium/drivers/nouveau/nv50/nv50_query.c
index b9c7d1e..e81ac5a 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_query.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_query.c
@@ -48,7 +48,7 @@ struct nv50_query {
    struct nouveau_mm_allocation *mm;
 };
 
-#define NV50_QUERY_ALLOC_SPACE 128
+#define NV50_QUERY_ALLOC_SPACE 256
 
 static INLINE struct nv50_query *
 nv50_query(struct pipe_query *pipe)
@@ -184,6 +184,16 @@ nv50_query_begin(struct pipe_context *pipe, struct pipe_query *pq)
       nv50_query_get(push, q, 0x20, 0x05805002);
       nv50_query_get(push, q, 0x30, 0x06805002);
       break;
+   case PIPE_QUERY_PIPELINE_STATISTICS:
+      nv50_query_get(push, q, 0x80, 0x00801002); /* VFETCH, VERTICES */
+      nv50_query_get(push, q, 0x90, 0x01801002); /* VFETCH, PRIMS */
+      nv50_query_get(push, q, 0xa0, 0x02802002); /* VP, LAUNCHES */
+      nv50_query_get(push, q, 0xb0, 0x03806002); /* GP, LAUNCHES */
+      nv50_query_get(push, q, 0xc0, 0x04806002); /* GP, PRIMS_OUT */
+      nv50_query_get(push, q, 0xd0, 0x07804002); /* RAST, PRIMS_IN */
+      nv50_query_get(push, q, 0xe0, 0x08804002); /* RAST, PRIMS_OUT */
+      nv50_query_get(push, q, 0xf0, 0x0980a002); /* ROP, PIXELS */
+      break;
    case PIPE_QUERY_TIME_ELAPSED:
       nv50_query_get(push, q, 0x10, 0x00005002);
       break;
@@ -217,6 +227,16 @@ nv50_query_end(struct pipe_context *pipe, struct pipe_query *pq)
       nv50_query_get(push, q, 0x00, 0x05805002);
       nv50_query_get(push, q, 0x10, 0x06805002);
       break;
+   case PIPE_QUERY_PIPELINE_STATISTICS:
+      nv50_query_get(push, q, 0x00, 0x00801002); /* VFETCH, VERTICES */
+      nv50_query_get(push, q, 0x10, 0x01801002); /* VFETCH, PRIMS */
+      nv50_query_get(push, q, 0x20, 0x02802002); /* VP, LAUNCHES */
+      nv50_query_get(push, q, 0x30, 0x03806002); /* GP, LAUNCHES */
+      nv50_query_get(push, q, 0x40, 0x04806002); /* GP, PRIMS_OUT */
+      nv50_query_get(push, q, 0x50, 0x07804002); /* RAST, PRIMS_IN */
+      nv50_query_get(push, q, 0x60, 0x08804002); /* RAST, PRIMS_OUT */
+      nv50_query_get(push, q, 0x70, 0x0980a002); /* ROP, PIXELS */
+      break;
    case PIPE_QUERY_TIMESTAMP:
       q->sequence++;
       /* fall through */
@@ -257,6 +277,7 @@ nv50_query_result(struct pipe_context *pipe, struct pipe_query *pq,
    uint32_t *res32 = (uint32_t *)result;
    boolean *res8 = (boolean *)result;
    uint64_t *data64 = (uint64_t *)q->data;
+   int i;
 
    if (!q->ready) /* update ? */
       q->ready = nv50_query_ready(q);
@@ -289,6 +310,10 @@ nv50_query_result(struct pipe_context *pipe, struct pipe_query *pq,
       res64[0] = data64[0] - data64[4];
       res64[1] = data64[2] - data64[6];
       break;
+   case PIPE_QUERY_PIPELINE_STATISTICS:
+      for (i = 0; i < 8; ++i)
+         res64[i] = data64[i * 2] - data64[16 + i * 2];
+      break;
    case PIPE_QUERY_TIMESTAMP:
       res64[0] = data64[1];
       break;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 6c1de08..95d1e6c 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -175,6 +175,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
    case PIPE_CAP_CLIP_HALFZ:
    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
+   case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
       return 1;
    case PIPE_CAP_SEAMLESS_CUBE_MAP:
       return 1; /* class_3d >= NVA0_3D_CLASS; */
@@ -198,7 +199,6 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
    case PIPE_CAP_TGSI_TEXCOORD:
-   case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
    case PIPE_CAP_TEXTURE_GATHER_SM5:
    case PIPE_CAP_FAKE_SW_MSAA: